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PDF PI74ALVC162835F Data sheet ( Hoja de datos )
| Número de pieza | PI74ALVC162835F | |
| Descripción | 16-Bit Universal Bus Driver | |
| Fabricantes | Pericom Semiconductor Corporation | |
| Logotipo |  |
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PI74ALVC162835F
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18-Bit Universal Bus Driver
with 3-State Outputs
Product Features
• PI74ALVC162835F is designed for low voltage operation,
VCC = 2.3V to 3.6V
• Outputs have equivalent 26Ω series resistors
www.DataS•heSeut4pUp.ocrotms PC133 Registered DIMM
• Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
• Typical VOHV (Output Voh Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
• Industrial operation at –40°C to +85°C
• Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 173 mil wide plastic TVSOP (K6)
– 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74ALVC series of logic circuits
are produced using the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The 18-bit PI74ALVC162835F universal bus driver is designed
for 2.3V to 3.6V VCC operation.
Data flow from A to Y is controlled by Output Enable (OE).
The device operates in the transparent mode when LE is HIGH. The
A data is latched if CLK is held at a high or low logic level. If LE
is LOW, the A-bus is stored in the latch/flip-flop on the low-to-high
transition of CLK. When OE is HIGH, the outputs are in the high-
impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Logic Block Diagram
27
OE
30
CLK
28
LE
54
A1
1D
C1
CLK
3 Y1
TO 17 OTHER CHANNELS
1 PS8377A 07/01/99
1 page  
PI74ALVC162835F
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Timing Requirements over Operating Range
Parameters
Description
Vcc = 2.5 V ± 0.2V
Min. Max.
Vcc = 2.7V
Min. Max.
fCLOCK
Clock frequency
0 150 0 150
tW Pulse
Duration
LE high
CLK high or low
3.3
3.3
3.3
3.3
www.DataSheteStU4US.ecotump
time
Data before CLK↑
Data before LE↓, CLK High
Data before LE↓, CLK Low
2.2
1.9
1.3
2.1
1.6
1.1
Data after CLK↑
tH Hold time
Data after LE↓, CLK High or Low
∆t/∆v(1)
Input Transition Rise or Fall
0.6
1.4
0
0.6
1.7
10 0 10
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
Vcc = 3.3V ± 0.3V
Min. Max.
0 150
3.3
3.3
1
1.5
1
0.6
1.4
0 10
Units
MHz
ns
ns/V
Switching Characteristics Over Operating Range(1)
Parameters
From
To VCC = 2.5V ± 0.2V
(Input) (Output) Min.
Max.
VCC = 2.7V
Min. Max.
VCC = 3.3V ±0.3V
Min.
Max.
fMAX
150 150 150
tPD A Y 1 5
tPD LE Y 1.3 5.9
51
5.8 1.3
4.2
5.1
tPD CLK Y 1.4 6.3
6.1 1.4
3.5
tEN
OE Y
1.4 6.3
6.5 1.1
tDIS OE Y
1 4.9
4.9 1.3
Notes:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
5.5
4.5
Units
MHz
ns
Operating Characteristics, TA = 25°C
Parameters
Test
Conditions
CPD Power Dissipation Outputs Enabled CL = 0pF,
Capacitance
Outputs Disabled F = 10 MHz
VCC = 2.5V ± 0.2V
Typical
35.5
12.5
VCC = 3.3V ± 0.3V
Typical
40
14
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5 PS8377A 07/01/99
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet PI74ALVC162835F.PDF ] | |
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