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PDF CM3132 Data sheet ( Hoja de datos )
| Número de pieza | CM3132 | |
| Descripción | Triple Linear Voltage Regulator | |
| Fabricantes | California Micro Devices | |
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Hay una vista previa y un enlace de descarga de CM3132 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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PRELIMINARY
CM3132
Triple Linear Voltage Regulator for DDR-I Memory and CPU
Features
• Fully integrated power solution for a CPU/SOC
core and DDR-I memory ICs
• Lowest system cost and smallest footprint with just
three external output capacitors
• Three linear regulators for VCORE (1.5A), VDDQ
(1.5A), and VTT (0.5A, source-sink)
www.DataShee•t4U.cVoDmDQ = 2.5V, VTT = VDDQ/2 ±25mV
• VCORE is adjustable, with a default output of 1.5V
• Over-temperature and reverse current protection
• Overcurrent protection for all regulators
• PSOP-8 package with integrated heat spreader
• Lead-free version available
Applications
• Core CPU and DDR-I memory power for:
− Set Top Boxes, DVD Players, Games
− Digital TVs, Flat Panel Displays
− Printers, Digital Projectors
− Embedded systems
− Communications systems
Product Description
The CM3132 provides an integrated power solution for a
CPU core and DDR-I memory for consumer and other
embedded applications. It features three independent linear
regulators for VCORE, VDDQ and VTT supply regulation. The
default voltage for VCORE is 1.5V. The SENSE_CORE pin
can be tied to GND for the default voltage, or through a
resistor divider for setting the CPU core in the range 1.2V to
1.8V. VDDQ is internally set to 2.50V and the VTT voltage is
always half the VDDQ voltage. A capacitor should be con-
nected to each of the three outputs.
There are two enable pins, EN_CORE and EN_DDR. When
EN_CORE is set high, the CORE regulator is disabled.
When EN_DDR is set high, the two DDR regulators are dis-
abled to minimize overall system power dissipation when
memory is in standby mode. These two enable pins allow
power sequencing of the DDR and CORE regulator blocks
independently.
The CM3132 is available in a PSOP-8 package that has
excellent thermal dissipation. It is available with optional
lead-free finishing.
Typical Application Circuit
2.8V to 3.3V
VCC
CVCC
Enable DDR
Memory #
EN_DDR
Enable CORE#
EN_CORE
VREF
R
R
VDDQ
REGULATOR
VDDQ = 2.5V
VTT
REGULATOR
CDDQ
VREF=1.25V
VTT=1.25V
DDR
MEMORY
CTT
VREF
VCORE
REGULATOR
VCORE
R3
SENSE_CORE R4
CCORE
CPU
CORE
+ I/O
GND
Circuit Schematic
VCC
VREF
EN_DDR
R
R
VDDQ
REGULATOR
VDDQ
VTT
REGULATOR
VTT
EN_CORE
VREF
VCORE
REGULATOR
VCORE
GND
SENSE_CORE
© 2004 California Micro Devices Corp. All rights reserved.
10/13/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ● Tel: 408.263.3214 ● Fax: 408.263.7846 ● www.calmicro.com
1
1 page  
PRELIMINARY
CM3132
ELECTRICAL OPERATING CHARACTERISTICS (CONT’D) (SEE NOTE1)
VTT Regulator Parameters
VTT Output Voltage Range
VTT REF Output Voltage Range
VTT LD Load Regulation
www.DataSheet4U.ceoNmTT
Output Noise Voltage
ITT LIM Current Limit
ITT SC Short Circuit Current
VCORE Regulator Parameters
VCC MIN Input Voltage
VDDQ = 2.5V, ITT = 0.01A,
IDDQ = 0A
VCC = 0V, VDDQ = 2.500V,
ITT = 0.01A
TA = 25°C, VDDQ = 2.5V,
0.01A ≤ ITT ≤ ±0.5A
BW = 10Hz - 100kHz, CTT = 10µF
VTT < 0.7V
VCORE = 1.5V, ICORE = 1.5A,
SENSE_CORE = 0V, Note 3
1.20 1.25 1.30
V
1.225 1.250 1.275
V
-1.0 - 1.0 %
51
0.6 0.8
0.3
µVrms
A
A
2.2 V
VCORE DEF Default Output Voltage Range
VCC = 3.3V, ICORE = 0.01A,
SENSE_CORE = 0V
1.45 1.50 1.55
V
VCORE ADJ Adjustable Output Voltage
Range
VCC = 3.3V, SENSE_CORE from
resistors R3 & R4, Note 4
1.2
1.8 V
VCORE LD Load Regulation
VCORE LINE Line Regulation
eN CORE
ICORE LIM
ICORE SC
Output Noise Voltage
Current Limit
Short Circuit Current
TA = 25°C, VCC = 3.3V,
0.01A ≤ ICORE ≤ ±1.5
TA = 25°C, 2.8V ≤ VCC ≤ 3.6V,
ICORE = 0.01A
BW = 10Hz - 100kHz, CCORE = 47µF
VCORE < 0.3V
-
-1.0
1.7
-
-
59
2.0
0.5
2.5 %
1.0 %
µVrms
A
A
Note 1: All parameters specified at TA = 0°C to +85°C unless otherwise noted.
Note 2: Note that the IDDQ current specified is the load current output from the VDDQ pin. VDDQ also supplies current internally to the
VTT regulator when it is sourcing current. The maximum source current can be up to 0.5A.The maximum total current from
the VDDQ regulator is the external VDDQ current IDDQ added to the maximum VTT sourcing current ITT. All load currents are
specified as such, but the VDDQ current limit is specified at a current just above the total maximum current.
Note 3: VCORE regulator only. Refer to VDDQ regulator parameters for VDDQ regulator.
Note 4: VCORE = 1.15V X (1 + RR-----34-- )
VCC(1)
EN_DDR
VDDQ OUT
VTT OUT
2.8V to 3.6V
X
Low
High
VDDQ
0V
VDDQ / 2
0V
Table 1: Truth Table for CM3132
© 2004 California Micro Devices Corp. All rights reserved.
10/13/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ● Tel: 408.263.3214 ● Fax: 408.263.7846 ● www.calmicro.com
5
5 Page 
Mechanical Details
PSOP-8 Mechanical Specifications
Dimensions for CM3132 devices packaged in an 8-
lead PSOP package with a heatspreader are shown
below.
PACKAGE DIMENSIONS
Package
PSOP-8
www.DataSheet4U.cLomeads
8
Dimensions
Millimeters
Min Max
Inches
Min Max
A
1.30
1.62
0.051
0.064
A1
0.03
0.10
0.001
0.004
B
0.33
0.51
0.013
0.020
C
0.18
0.25
0.007
0.010
D
4.83
5.00
0.190
0.197
E
3.81
3.99
0.150
0.157
e
1.02
1.52
0.040
0.060
H
5.79
6.20
0.228
0.244
L
0.41
1.27
0.016
0.050
x**
3.30
3.81
0.130
0.150
y**
2.29
2.79
0.090
0.110
# per tube
100 pieces*
# per tape
and reel
2500 pieces
Controlling dimension: inches
* This is an approximate number which may vary.
** Centered on package centerline.
PRELIMINARY
CM3132
Mechanical Package Diagrams
TOP VIEW
D
8765
H Pin 1 E
Marking
1234
BOTTOM VIEW
D
1234
Heat Slug
Hy
x
x/2 y/2
E
8765
SIDE VIEW
A
SEATING
PLANE
B
e
END VIEW
C
A1
L
Package Dimensions for PSOP-8
© 2004 California Micro Devices Corp. All rights reserved.
10/13/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ● Tel: 408.263.3214 ● Fax: 408.263.7846 ● www.calmicro.com 11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet CM3132.PDF ] | |
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