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Número de pieza | TMP92CA25FG | |
Descripción | Original CMOS 32-Bit Microcontroller | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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TOSHIBA Original CMOS 32-Bit Microcontroller
TLCS-900/H1 Series
TMP92CA25FG
Semiconductor Company
1 page TMP92CA25
(20) MMU
• Expandable up to 512 Mbytes (3 local area/8 bank method)
• Independent bank for each program, read data, write data and LCD display data
(21) Interrupts: 49 interrupt
• 9 CPU interrupts: Software interrupt instruction and illegal instruction
• 34 internal interrupts: Seven selectable priority levels
• 7 external interrupts: Seven selectable priority levels (6-edge selectable)
(21) Input/output ports: 84 pins (Except Data bus (16bit), Address bus (24bit) and RD pin)
www.DataSheet4U.com(22) NAND flash interface: 2 channels
• Direct NAND flash connection capability
• ECC (error detection) calculation (for SLC- type)
(23) Stand-by function
• Three HALT modes: IDLE2 (programmable), IDLE1, STOP
• Each pin status programmable for stand-by mode
(24) Triple-clock controller
• Clock doubler (PLL) supplies 40 system-clock from external 10MHz oscillator to CPU
• Clock gear function: Select high-frequency clock fc to fc/16
• RTC (fs = 32.768 kHz)
(25) Operating voltage:
• VCC = 3.0 V to 3.6 V (fc max = 40 MHz)
• VCC = 2.7 V to 3.6 V (fc max = 27 MHz)
(26) Package:
• 144-pin QFP (P-LQFP144 -1616-0.40C)
• 144-pin chip form is also available. For details, contact your local Toshiba sales
representative.
92CA25-3
2007-02-28
5 Page TMP92CA25
Table 2.3.3 Pin Names and Functions (3/5)
Pin Name
Number of
Pins
I/O
Function
PC0
I/O Port C0: I/O port (Schmitt-input)
INT0
1 Input Interrupt request pin 0: Interrupt request pin with programmable level/rising/falling edge
TA1OUT
Output 8-bit timer 1 output: Timer 1 output
PC1
I/O Port C1: I/O port (Schmitt-input)
INT1
1 Input Interrupt request pin 1: Interrupt request pin with programmable rising/falling edge
TA3OUT
Output 8-bit timer 3 output: Timer 3 output
PC2
I/O Port C2: I/O port (Schmitt-input)
INT2
1 Input Interrupt request pin 2: Interrupt request pin with programmable rising/falling edge
TB0OUT0
Output Timer B0 output
PC3
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INT3
I/O Port C3: I/O port (Schmitt-input)
1
Input Interrupt request pin 3: Interrupt request pin with programmable rising/falling edge
PC4 to PC5
2
I/O Port C4 to C5: U/O port
PC6 I/O Port C6: I/O port
KO8
1 Output Key Output 8: Pin used of key-scan strobe (Open-drain output programmable)
EA24
Output Extended Address 24
PC7 I/O Port C7: I/O port
CSZF
1 Output Expand chip select: ZF: Outputs “0” when address is within specified address area
EA25
Output Extended Address 25
PF0
TXD0
I/O Port F0: I/O port (Schmitt-input)
1
Output Serial 0 send data: Open-drain output programmable
PF1
RXD0
I/O Port F1: I/O port (Schmitt-input)
1
Input Serial 0 receive data
PF2 I/O Port F2: I/O port (Schmitt-input)
SCLK0
1 I/O Serial 0 clock I/O
CTS0
Input Serial 0 data send enable (Clear to send)
PF7
SDCLK
Output Port F7: Output port
1
Output Clock for SDRAM (When SDRAM is not used, SDCLK can be used as system clock)
PG0 to PG1
AN0 to AN1
2
Input Port G0 to G1 port: Pin used to input ports
Input Analog input 0 to 1: Pin used to Input to AD conveter
PG2
Input Port G2 port: Pin used to input ports
AN2 1 Input Analog input 2: Pin used to Input to AD conveter
MX Output X-Minus: Pin connectted to X− for touch screen panel
PG3
Input Port G3 port: Pin used to input ports
AN3 Input Analog input 3: Pin used to input to AD conveter
1
MY Output Y-Minus: Pin connectted to Y− for touch screen panel
ADTRG
Intput AD trigger: Signal used to request AD start
92CA25-9
2007-02-28
11 Page |
Páginas | Total 70 Páginas | |
PDF Descargar | [ Datasheet TMP92CA25FG.PDF ] |
Número de pieza | Descripción | Fabricantes |
TMP92CA25FG | Original CMOS 32-Bit Microcontroller | Toshiba Semiconductor |
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