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PDF AHV28xx Data sheet ( Hoja de datos )
| Número de pieza | AHV28xx | |
| Descripción | ADVANCED ANALOG HYBRID-HIGH RELIABILITY DC/DC CONVERTERS | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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PD - 94583
AHV28XX SERIES
ADVANCED ANALOG
28V Input, Single, Dual and Triple Output
HYBRID-HIGH RELIABILITY
DC/DC CONVERTERS
www.DataSheet4U.com
Description
The AHV Series of DC/DC converters are designed to
replace the AHE/ATO family of converters in applica-
tions requiring compliance to MIL-STD-704A through
E, in particular the input surge requirement of 80 volts
specified to withstand transient input voltage of 80 volts.
No input voltage or output power derating is necessary
over the full military temperature range.
These converters are packaged in an extremely rug-
ged, low profile package that meets all requirements of
MIL-STD-883 and MIL-PRF-38534. Parallel seam weld
sealing and the use of ceramic pin feedthru seals as-
sure long term hermeticity after exposure to extended
temperature cycling.
The basic circuit is a push-pull forward topology using
power MOSFET switches. The nominal switching fre-
quency is 500KHz. A unique current injection circuit
assures current balancing in the power switches. All
AHV series converters use a single stage LC input filter
to attenuate input ripple current. A low power 11.5volt
series regulator provides power to an epitaxial CMOS
custom pulse width modulator integrated circuit. This
single integrated circuit provides all PWM primary cir-
cuit functions. Power is transferred from primary to sec-
ondary through a ferrite core power transformer. An
error voltage signal is generated by comparing a highly
stable reference voltage with the converter output volt-
age and drives the PWM through a unique wideband
magnetic feedback circuit. This proprietary feedback
circuit provides an extremely wide bandwidth, high gain
control loop, with high phase margin. The feedback
control loop gain is insensitive to temperature, radia-
tion, aging, and variations in manufacturing. The trans-
fer function of the feedback circuit is a function of the
feedback transformer turns ratio which cannot change
when subjected to environmental extremes.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are available in four screen-
ing grades to satisfy a wide range of requirements.
www.irf.com
AHV
Features
n 80 Transient Input (100 msec max.)
n 50 VDC Input (Continous)
n 16 to 40 VDC Input Range
n Single, Dual and Triple Outputs
n 15 Watts Output Power
(No Temperature Derating)
n Low Input / Output Noise
n Full Military Temperature Range
n Wideband PWM Control Loop
n Magnetic Feedback
n Low Profile Hermetic Package (0.405”)
n Short Circuit and Overload Protection
n Constant Switching Frequency (500KHz)
n True Hermetic Package (Parallel Seam
Welded, Ceramic Pin Feedthru)
The CH grade is fully compliant to the require-
ments of MIL-PRF-38534 for class H. The HB
grade is processed and screened to the class H
requirement, but may not necessarily meet all of
the other MIL-PRF-38534 requirements, e.g., el-
ement evaluation and Periodic Inspection (P.I.)
not required. Both grades are tested to meet the
complete group “A” test specification over the full
military temperature range without output power
deration. Two grades with more limited screen-
ing are also available for use in less demanding
applications. Variations in electrical, mechanical
and screening can be accommodated. Contact
Advanced Analog for special requirements.
1
11/20/02
1 page  
AHV28XX Series
Specifications (Triple Output Models) - continued
TEST
www.DataSheet4U.com
DYNAMIC
CHARACTERISTICS
Step Load Changes
Output Transient 9
Recovery 9,10
Step Line Changes
Output Transient
Recovery 7,10, 11
TURN-ON
Overshoot 1
Delay 1,12
Load Fault Recovery 7
SYMBOL
Condition
-55°C ≤ TC ≤ +125°C,
V
IN
=
28
V
DC
±5%,
C =0,
L
unless otherwise specified
VOTLOAD
TTLOAD
VOTLINE
TTLINE
VTonOS
T on D
TRLF
50% Load 135 100% Load
No Load 135 50%
50% Load 135 100%
No Load 335 50% Load
50% Load 335 No lLoad
Input step 16 to 40 VDC
Input step 40 to 16 VDC
Input step 16 to 40 VDC
Input step 40 to 16 VDC
IOUT = O and ±625mA
IOUT = O and ±625mA
Group A
Subgroups
AHV2812T
Min Max
AHV2815T
Min Max
Units
4
-300
+300
-300
+300
mVpk
4
-400
+400
-400
+400
mVpk
4 100 100 µS
4
2000
2000
µS
4 5 5 ms
4
1200
1200
mVpk
4
-1500
-1500
mVpk
4 4 4 µs
4 4 4 µs
4 750 750 mVpk
4 15 15 ms
4 15 15 ms
Notes to Specifications (Triple Output Models)
1. Tested at each output.
2. Parameter guaranteed by line and load regulation tests.
3. At least 25 percent of the total power should be taken from the (+5 volt) main output.
4. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
5. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
8. Above 125°C case temperature, derate output power linearly to 0 at 135°C case.
9. Load step transition time between 2 and 10 microseconds.
10.
Recovery
time
is
measured
from
the
initiation
of
the
transient
to
where
V
OUT
has
returned
to
within
±1
percent
of
V
OUT
at
50
percent
load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 8) while power is applied to the input.
Notes to Specifications (Dual Output Models)
1. Tested at each output.
2. Parameter guaranteed by line and load regulation tests.
3. Bandwidth guaranteed by design. Tested for 20KHz to 2MHz.
4. Total power at both outputs.
5. When operating with unbalanced loads, at least 25% of the load must be on the positive output to maintain regulation.
6. Capacitive load may be any value from 0 to the maximum limit without affecting dc performance. A capacitive load in excess of the
maximum limit will not disturb loop stability but may interfere with the operation of the load fault detection circuitry, appearing as a
short circuit during turn-on.
7. Parameter shall be tested as part of design characterization and after design or process changes. Thereafter parameters shall be
guaranteed to the limits specified.
8. An overload is that condition with a load in excess of the rated load but less than that necessary to trigger the short circuit
protection and is the condition of maximum power dissipation.
9. Load step transition time between 2 and 10 microseconds.
10. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1 percent of VOUT at 50 percent
load.
11. Input step transition time between 2 and 10 microseconds.
12. Turn on delay time measurement is for either a step application of power at input or the removal of a ground signal from the inhibit
pin (pin 2) while power is applied to the input.
13. Above 125°C case temperature, derate output power linearly to 0 at 135°C.
www.irf.com
5
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