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PDF AKD4126-A Data sheet ( Hoja de datos )

Número de pieza AKD4126-A
Descripción digital sample rate converter
Fabricantes Asahi Kasei Microsystems 
Logotipo Asahi Kasei Microsystems Logotipo



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No Preview Available ! AKD4126-A Hoja de datos, Descripción, Manual

ASAHI KASEI
[AKD4126-A]
AKD4126-A
AK4126 Evaluation Board Rev.2
GENERAL DESCRIPTION
The AKD4126-A is an evaluation board for the AK4126, the digital sample rate converter. The
AKD4126-A has the digital audio interface and can achieve the interface with digital audio system via
opt-connector.
„ Ordering guide
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AKD4126-A --- AK4126 Evaluation Board
FUNCTION
DIR/DIT with optical input/output
10pin Header for AKM AD/DA evaluation board
Opt In
AK4114
5V GND
Regulator
AK4114
Opt Out
COAX
COAX
10pin
Header
DSP
Data
AK4126
10pin
Header
Figure 1. AKD4126-A Block Diagram
* Circuit diagram and PCB layout are attached at the end of this manual.
DSP
Data
<KM083203>
-1-
2007/01

1 page




AKD4126-A pdf
ASAHI KASEI
[AKD4126-A]
(1)-2. External equipments are connected via 10-pin connector (PORT2).
(1)-2-1. Set up RX
As Optical connector: PORT1 (OPT) and BNC connector: J1 (COAX) are not used, please don’t connect
anything.
(1)-2-2. Set up IBICK, ILRCK and SDTI
Clocks (IBICK and ILRCK) and data (SDTI) of AK4126 (U1) are supplied from external equipments via
10-pin connector: PORT2 (INPUT).
JP13
IM CLK
JP10
IB IC K 1
JP12
IL R C K
JP 11
SDTI
JP14
IB IC K 2
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(O pen)
(O pen)
(O pen)
(O pen)
INV THR
(THR)
(1)-2-3. Set up SDTI1, SDTI2 and SDTI3
Select input data to SDTI1, SDTI2 and SDTI3 of the AK4126 (U1). When these jumper pins are set to SDTI
side, output data of external equipment is input to SDTI1, SDTI2 and SDTI3 via 10-pin connector: PORT2
(INPUT). When these jumper pins are set to GND side, “0” data is input to SDTI1, SDTI2 and SDTI3.
(a) “0” data is input to SDTI1
JP1
SD T I1
(b) Output data of external equipment is input to SDTI1
JP1
SD TI1
GND SDTI
(G ND)
GND SDTI
(SD T I)
(a) “0” data is input to SDTI2
JP3
SD TI2
(b) Output data of external equipment is input to SDTI2
JP3
SD TI2
GND SDTI
(G ND)
GND SDTI
(SD T I)
(a) “0” data is input to SDTI3
JP5
SD TI3
(b) Output data of external equipment is input to SDTI3
JP5
SD TI3
GND SDTI
(G ND)
GND SDTI
(SD T I)
(1)-2-4. Set up PLL Mode and Input Audio Interface Format of the AK4126 (U1)
Set up PLL Mode and Input Audio Interface Format of the AK4126 (U1) by SW1. About setting of
default, please refer to Table1. About setting except default, please refer to Table2 and Table3.
<KM083203>
-5-
2007/01

5 Page





AKD4126-A arduino
ASAHI KASEI
[AKD4126-A]
(1)-2. Set up the AK4114 (U2)
Set up SW4
ON is “H”, and OFF is “L”.
Setting of default (Master mode, 24bit Left justified) is as follows. (Please refer to Table 4.)
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SW4
No.
1
2
3
4
5
6
7
Name
DIF2
DIF1
DIF0
CM1
CM0
OCKS1
OCKS0
ON (“H”)
OFF (“L”)
AK4114 Output Audio Interface Format
Setting
Please refer to Table 5.
AK4114 Clock Mode Setting
Fixed to “L”.
AK4114 Master Clock Frequency Setting
Please refer to Table 7.
Table 4. SW4 Setting
Default
H
L
L
L
L
H
L
Mode
0
1
2
3
4
5
6
7
DIF2 DIF1 DIF0
pin pin pin
SDTO Format
LRCK
I/O
BICK
I/O
L L L 16bit, Right justified H/L O 64fs O
L L H 18bit, Right justified H/L O 64fs O
L H L 20bit, Right justified H/L O 64fs O
L H H 24bit, Right justified H/L O 64fs O
H L L 24bit, Left justified H/L O 64fs O
H L H 24bit, I2S Compatible L/H O 64fs O
H H L 24bit, Left justified H/L I 64-128fs I
H H H 24bit, I2S Compatible L/H I 64-128fs I
Table 5. AK4114 Output Audio Interface Format Setting
(Default)
Mode
0
1
2
3
OCKS1 OCKS0 MCKO1 MCKO2 X’tal fs (max)
pin pin
L
L
256fs
256fs 256fs 96 kHz
L
H
256fs
128fs 256fs 96 kHz
H
L
512fs
256fs 512fs 48 kHz
H
H
128fs
64fs 128fs 192 kHz
Table 7. AK4114 Master Clock Frequency Setting
(Default)
<KM083203>
- 11 -
2007/01

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