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PDF CYW2338 Data sheet ( Hoja de datos )
| Número de pieza | CYW2338 | |
| Descripción | Dual Serial Input PLL | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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12338\CYW2338
PRELIMINARY
CYW2338
Dual Serial Input PLL with 2.5- and 1.1-GHz Prescalers
Features
• Operating voltage 2.7V to 5.5V
• Operating frequency to 2.5 GHz on PLL1 and 1.1 GHz
on PLL2 with prescaler ratios of 64/65 and 128/129
• Lock detect feature
• Power-down mode ICC < 1 µA typical at 3.0V
• Serial data input accepts data clock rates as low as
1 kHz
www.DataSheet4• UmL.cooowmdepower/voltage operation with low current standby
• On-chip reference oscillator
• Available in a 20-pin TSSOP (Thin Shrink Small Outline
Package)
• Available in a 24-pin CSP (Chip Scale Package)
• Available in a 20-pin MLF
(Mirco Lead Frame Package)
Applications
The Cypress CYW2338 is a dual serial input PLL frequency
synthesizer designed for high performance dual conversion
TV, VCR, and Set-top tuner sections, as well as downstream
receivers for cable modems. The CYW2338 is also well suited
for high-volume, low-cost wireless communications applica-
tions. One 2.5-GHz and 1.1-GHz prescaler, each with pulse
swallow capability are included. The device operates from
2.7V and dissipates only 27 mW.
Dual PLL Block Diagram
GND (4)
GND (7)
VCC1 (1) VCC2 (20) VP1 (2)
FIN1 (5)
FIN1# (6)
Prescaler
64/65 or
128/129
Binary 7-Bit
Swallow Counter
Binary 11-Bit
fp1
Programmable Counter
Phase
Detector
Charge
Pump
DOPLL1 (3)
OSC_IN (8)
OSC_OUT (9)
LE (13)
DATA (12)
CLOCK (11)
Latch
Selector
Cntrl 22-Bit
Shift
Reg.
19-Bit
Latch
Pwr-dwn
PLL1
15-Bit
Reference Counter
fr1
20-Bit Latch
20-Bit Latch
15-Bit
Reference Counter
fr2
19-Bit
Latch
Pwr-dwn
PLL2
fr fp
Monitor
Output
Selector
Power
Control
FO/LD (10)
FIN2 (16)
FIN2# (15)
Prescaler
64/65 or
128/129
Pin Configuration
VCC1
VP1
DOPLL1
GND
FIN1
FIN1#
GND
OSC_IN
OSC_OUT
FO/LD
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
TSSOP
Binary 4-Bit
Swallow Counter
Binary 11-Bit
Programmable Counter fp2
Phase
Detector
Charge
Pump
DOPLL2 (18)
GND (14)
GND (17)
VP2 (19)
VCC2
VP2
DOPLL2
GND
FIN2
FIN2#
GND
LE
DATA
CLOCK
NC
Vp1
DoPLL1
GND
Fin1
Fin1#
GND
OSC_IN
NC
1 21
2 20
3 19
4 18
5 (Top View) 17
6 16
7 15
8 14
9 13
NC
DoPLL2
GND
Fin2
Fin2#
GND
LE
DATA
NC
CSP
DoPLL1
GND
Fin1
Fin1#
GND
1
2
3
4
5
(Top View)
15 GND
14 Fin2
13 Fin2#
12 GND
11 LE
MLF
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
February 6, 2001, rev. **
1 page  
Timing Waveforms
Key:
PRELIMINARY
CYW2338
Increasing
Voltage
www.DataSheet4U.com
Increasing Frequency
VCO Characteristics
Phase Detector Output Waveform
FR
FC Bit HIGH
FC Bit LOW
(Refer to Table 2 for meaning of FC bit.)
Phase Comparator Sense
FP
tw
LD
tw
DO Charge Pump Output Current Waveform
FR
FP
tw
Do
tw
IDO Hi-Impedance State
5
5 Page 
Package Diagram
PRELIMINARY
CYW2338
www.DataSheet4U.com
24-Pin Chip Scale Package (CSP 3.5 mm X 4.5 mm)
3.50
PIN 1 PAD CORNER
d 0.20 4X
X
f 0.10 Z
Z
d 0.10 Z
4.50
TOP VIEW
Y
1.04±0.10
0.70±0.05
SIDE VIEW
21
0.50
PIN 1 PAD CORNER
22 24
1 0.45 X 0.25 TYP
j 0.15 m Z X Y
ALL DIMENSIONS AND TOLERANCES CONFORM TO ASME Y14.5M-1994.
UNLESS OTHERWISE SPECIFIED
13
12
0.50
4X 0.25
9
10
4X 1.25
BOTTOM VIEW
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet CYW2338.PDF ] | |
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