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PDF LTC4300A-2 Data sheet ( Hoja de datos )
| Número de pieza | LTC4300A-2 | |
| Descripción | (LTC4300A-1/-2) Hot Swappable 2-Wire Bus Buffers | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
s Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
s Isolates Input SDA and SCL Lines from Output
www.DataShseetC4Uo.mcopmatible with I2CTM, I2C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
s Small MSOP 8-Pin Package
s Low ICC Chip Disable: <1µA (LTC4300A-1)
s READY Open Drain Output (LTC4300A-1)
s 1V Precharge on all SDA and SCL Lines
s Supports Clock Stretching, Arbitration and
Synchronization
s 5V to 3.3V Level Translation (LTC4300A-2)
s High Impedance SDA, SCL Pins for VCC = 0V
U
APPLICATIO S
s Hot Board Insertion
s Servers
s Capacitance Buffer/Bus Extender
s Desktop Computer
, LTC and LT are registered trademarks of Linear Technology Corporation.
I2C is a trademark of Philips Electronics N. V.
*U.S. Patent No. 6,650,174
LTC4300A-1/LTC4300A-2
Hot Swappable
2-Wire Bus Buffers
DESCRIPTIO
The LTC®4300A series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without
corruption of the data and clock busses. When the con-
nection is made, the LTC4300A-1/LTC4300A-2 provide
bidirectional buffering, keeping the backplane and card
capacitances isolated. Rise-time accelerator circuitry*
allows the use of weaker DC pull-up currents while still
meeting rise-time requirements. During insertion, the
SDA and SCL lines are precharged to 1V to minimize bus
disturbances.
The LTC4300A-1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
mode when driven to ground and sets normal operation when
driven to VCC. It also includes an open drain READY output
pin, which indicates that the backplane and card sides are
connected together. The LTC4300A-2 replaces the ENABLE
pin with a dedicated supply voltage pin, VCC2, for the card
side, providing level shifting between 3.3V and 5V systems.
Both the backplane and card may be powered with supply
voltages ranging from 2.7V to 5.5V, with no contraints on
which supply voltage is higher. The LTC4300A-2 also re-
places the READY pin with a digital CMOS input pin, ACC,
which enables and disables the rise-time accelerator currents.
The LTC4300A is available in a small 8-pin MSOP package.
TYPICAL APPLICATIO
VCC
3.3V
SCLIN
R1 R2
10k 10k
3
8
C1
0.01µF
2
R3 R4
10k 10k
SCLOUT
SDAIN
67
1
LTC4300A-1
5
ENABLE GND READY
4
4300A-1/2 TA01
SDAOUT
Input–Output Connection tPLH
OUTPUT
SIDE
50pF
INPUT
SIDE
150pF
4300A TA02
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1
1 page  
LTC4300A-1/LTC4300A-2
PI FU CTIO S
ENABLE/VCC2 (Pin 1): Chip Enable Pin/Card Supply Volt-
age. For the LTC4300A-1, this is a digital CMOS threshold
input pin. Grounding this pin puts the part in a low current
(<1µA) mode. It also disables the rise-time accelerators,
disables the bus precharge circuitry, drives READY low,
isolates SDAIN from SDAOUT and isolates SCLIN from
SCLOUT. Drive ENABLE all the way to VCC for normal
operation. Connect ENABLE to VCC if this feature is not
w w w . D a tbaeSinhgeueste4dU. F. coor tmhe LTC4300A-2, this is the supply voltage
for the devices on the card I2C busses. Connect pull-up
resistors from SDAOUT and SCLOUT to this pin. Place a
bypass capacitor of at least 0.01µF close to this pin for best
results.
SCLOUT (Pin 2): Serial Clock Output. Connect this pin to
the SCL bus on the card.
SCLIN (Pin 3): Serial Clock Input. Connect this pin to the
SCL bus on the backplane.
GND (Pin 4): Ground. Connect this pin to a ground plane
for best results.
READY/ACC (Pin 5): Connection Flag/Rise-Time Accel-
erator Control. For the LTC4300A-1, this is an open-drain
NMOS output which pulls low when either ENABLE is low
or the start-up sequence described in the Operation sec-
tion has not been completed. READY goes high when
ENABLE is high and start-up is complete. Connect a 10k
resistor from this pin to VCC to provide the pull up. For the
LTC4300A-2, this is a CMOS threshold digital input pin
that enables and disables the rise-time accelerators on all
four SDA and SCL pins. Drive ACC all the way to the VCC2
supply voltage to enable all four accelerators; drive ACC to
ground to turn them off.
SDAIN (Pin 6): Serial Data Input. Connect this pin to the
SDA bus on the backplane.
SDAOUT (Pin 7): Serial Data Output. Connect this pin to
the SDA bus on the card.
VCC (Pin 8): Main Input Power Supply from Backplane.
This is the supply voltage for the devices on the backplane
I2C busses. Connect pull-up resistors from SDAIN and
SCLIN (and also from SDAOUT and SCLOUT for the
LTC4300A-1) to this pin. Place a bypass capacitor of at
least 0.01µF close to this pin for best results.
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5 Page 
LTC4300A-1/LTC4300A-2
APPLICATIO S I FOR ATIO
these applications, note that if the I/O cards were plugged
directly into the backplane, all of the backplane and card
capacitances would add directly together, making rise- and
fall-time requirements difficult to meet. Placing a
LTC4300A on the edge of each card, however, isolates the
card capacitance from the backplane. For a given I/O card,
the LTC4300A drives the capacitance of everything on the
card and the backplane must drive only the capacitance of
www.DataShteheet4LUT.cCom4300A, which is less than 10pF.
Figure 3 shows the LTC4300A-1 in a CompactPCITM con-
figuration. Connect VCC and ENABLE to the output of one
of the CompactPCI power supply Hot Swap circuits. Use
a pull-up resistor to ENABLE for a card side enable/disable.
VCC is monitored by a filtered UVLO circuit. With the VCC
voltage powering up after all other pins have established
connection, the UVLO circuit ensures that the backplane
and card data and clock busses are not connected until the
transients associated with live insertion have settled. Owing
to their small capacitance, the SDAIN and SCLIN pins cause
minimal disturbance on the backplane busses when they
make contact with the connector.
Figure 4 shows the LTC4300A-2 in a CompactPCI configu-
ration. The LTC4300A-2 receives its VCC voltage from one
of the long “early power” pins. Because this power is not
switched, add a 5Ω to 10Ω resistor between the VCC pins
CompactPCI is a trademark of the PCI Industrial Computer Manufacturers Group.
VCC2
BACKPLANE
BD_SEL
VCC
SDA
SCL
R1
10k
R2
10k
BACKPLANE
CONNECTOR
POWER SUPPLY
I/O PERIPHERAL CARD 1
HOT SWAP
5.1Ω
VCC
C1
0.01µF
R4 R5 R6
10k 10k 10k
VCC2
SDAOUT
CARD_SDA
SDAIN
U1 SCLOUT
LTC4300A-2
CARD_SCL
C2 0.01µF
SCLIN
GND
ACC
POWER SUPPLY
I/O PERIPHERAL CARD 2
HOT SWAP
5.1Ω
VCC
C3
0.01µF
R8 R9 R10
10k 10k 10k
VCC2
SDAOUT
CARD2_SDA
SDAIN
U2 SCLOUT
LTC4300A-2
CARD2_SCL
C4 0.01µF
SCLIN
GND
ACC
POWER SUPPLY
HOT SWAP
5.1Ω
C6 0.01µF
I/O PERIPHERAL CARD N
VCC
SDAIN
SCLIN
C5
0.01µF
VCC2
U3
LTC4300A-2
GND
SDAOUT
SCLOUT
ACC
R12 R13 R14
10k 10k 10k
CARDN_SDA
CARDN_SCL
4300A-1/2 F04
Figure 4. Inserting Multiple I/O Cards into a Live Backplane Using the LTC4300A-2 in a CompactPCI System
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11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC4300A-2.PDF ] | |
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