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PDF LTC4300-1 Data sheet ( Hoja de datos )
| Número de pieza | LTC4300-1 | |
| Descripción | (LTC4300-1/-2) Hot Swappable 2-Wire Bus Buffers | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s Bidirectional Buffer for SDA and SCL Lines
Increases Fanout
s Prevents SDA and SCL Corruption During Live
Board Insertion and Removal from Backplane
s Isolates Input SDA and SCL Lines from Output
www.DataShseetC4Uo.mcopmatible with I2CTM, I2C Fast Mode and SMBus
Standards (Up to 400kHz Operation)
s Small MSOP 8-Pin Package
s Low ICC Chip Disable: <1µA (LTC4300-1)
s READY Open Drain Output (LTC4300-1)
s 1V Precharge on all SDA and SCL Lines
s Supports Clock Stretching, Arbitration and
Synchronization
s 5V to 3.3V Level Translation (LTC4300-2)
s High Impedance SDA, SCL Pins for VCC = 0V
U
APPLICATIO S
s Hot Board Insertion
s Servers
s Capacitance Buffer/Bus Extender
s Desktop Computer
, LTC and LT are registered trademarks of Linear Technology Corporation.
I2C is a trademark of Philips Electronics N. V.
*U.S. Patent No. 6,650,174
LTC4300-1/LTC4300-2
Hot Swappable
2-Wire Bus Buffers
DESCRIPTIO
The LTC®4300 series hot swappable 2-wire bus buffers
allow I/O card insertion into a live backplane without cor-
ruption of the data and clock busses. When the connection
is made, the LTC4300-1/LTC4300-2 provide bidirectional
buffering, keeping the backplane and card capacitances
isolated. Rise-time accelerator circuitry* allows the use of
weaker DC pull-up currents while still meeting rise-time
requirements. During insertion, the SDA and SCL lines are
precharged to 1V to minimize bus disturbances.
The LTC4300-1 incorporates a CMOS threshold digital
ENABLE input pin, which forces the part into a low current
mode when driven to ground and sets normal operation when
driven to VCC. It also includes an open drain READY output
pin, which indicates that the backplane and card sides are
connected together. The LTC4300-2 replaces the ENABLE
pin with a dedicated supply voltage pin, VCC2, for the card
side, providing level shifting between 3.3V and 5V systems.
Both the backplane and card may be powered with supply
voltages ranging from 2.7V to 5.5V, with no contraints on
which supply voltage is higher. The LTC4300-2 also replaces
the READY pin with a digital CMOS input pin, ACC, which
enables and disables the rise-time accelerator currents.
The LTC4300 is available in a small 8-pin MSOP package.
TYPICAL APPLICATIO
VCC
3.3V
SCLIN
R1 R2
24k 24k
3
C2*
8
C1
0.01µF
2
R3 R4
24k 24k
SCLOUT
C4*
SDAIN
C3*
6
7
*CAPACITORS NOT REQUIRED
IF BUS IS SUFFICIENTLY LOADED
1
LTC4300-1
5
ENABLE GND READY
4
SDAOUT
C5*
4300-1/2 TA01
Input–Output Connection tPLH
OUTPUT
SIDE
50pF
INPUT
SIDE
150pF
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1 page  
LTC4300-1/LTC4300-2
PI FU CTIO S
ENABLE/VCC2 (Pin 1): Chip Enable Pin/Card Supply Volt-
age. For the LTC4300-1, this is a digital CMOS threshold
input pin. Grounding this pin puts the part in a low current
(<1µA) mode. It also disables the rise-time accelerators,
disables the bus precharge circuitry, drives READY low,
isolates SDAIN from SDAOUT and isolates SCLIN from
SCLOUT. Drive ENABLE all the way to VCC for normal
operation. Connect ENABLE to VCC if this feature is not
w w w . D a tbaeSinhge uest e4dU..Fcoormthe LTC4300-2, this is the supply voltage
for the devices on the card I2C busses. Connect pull-up
resistors from SDAOUT and SCLOUT to this pin. Place a
bypass capacitor of at least 0.01µF close to this pin for best
results.
SCLOUT (Pin 2): Serial Clock Output. Connect this pin to
the SCL bus on the card. See Figures 3 and 4 for bus pull-
up resistance and capacitance requirements.
SCLIN (Pin 3): Serial Clock Input. Connect this pin to the
SCL bus on the backplane. See Figures 3 and 4 for bus pull-
up resistance and capacitance requirements.
GND (Pin 4): Ground. Connect this pin to a ground plane
for best results.
READY/ACC (Pin 5): Connection Flag/Rise-Time Accel-
erator Control. For the LTC4300-1, this is an open-drain
NMOS output which pulls low when either ENABLE is low
or the start-up sequence described in the Operation sec-
tion has not been completed. READY goes high when
ENABLE is high and start-up is complete. Connect a 10k
resistor from this pin to VCC to provide the pull up. For the
LTC4300-2, this is a CMOS threshold digital input pin that
enables and disables the rise-time accelerators on all four
SDA and SCL pins. Drive ACC all the way to the VCC2 supply
voltage to enable all four accelerators; drive ACC to ground
to turn them off.
SDAIN (Pin 6): Serial Data Input. Connect this pin to the
SDA bus on the backplane. See Figures 3 and 4 for bus
pull-up resistance and capacitance requirements.
SDAOUT (Pin 7): Serial Data Output. Connect this pin to
the SDA bus on the card. See Figures 3 and 4 for bus pull-
up resistance and capacitance requirements.
VCC (Pin 8): Main Input Power Supply from Backplane.
This is the supply voltage for the devices on the backplane
I2C busses. Connect pull-up resistors from SDAIN and
SCLIN to this pin. Place a bypass capacitor of at least
0.01µF close to this pin for best results.
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LTC4300-1/LTC4300-2
APPLICATIO S I FOR ATIO
ciated with hot swapping have settled. Owing to their small
capacitance, the SDAIN and SCLIN pins cause minimal dis-
turbance on the backplane busses when they make con-
tact with the connector.
Figure 6 shows the LTC4300-2 in a CompactPCI configu-
ration. The LTC4300-2 receives its VCC voltage from one
of the long “early power” pins. Because this power is not
switched, add a 5Ω to 10Ω resistor between the VCC pins
www.DataShoefet4thUe.cocmonnector and the LTC4300-2, as shown in the
figure. In addition, make sure that the VCC bypassing on
the backplane is large compared to the 0.01µF bypass
capacitor on the card. Establishing early power VCC en-
sures that the 1V precharge voltage is present at the
SDAIN and SCLIN pins before they make contact. Connect
VCC2 to the output of one of the CompactPCI power supply
hot swap circuits. VCC2 is monitored by a filtered UVLO
circuit. With the VCC2 voltage powering up after all other
pins have established connection, the UVLO circuit en-
sures that the backplane and card data and clock busses
are not connected until the transients associated with hot
swapping have settled.
Figure 7 shows the LTC4300-1 in a PCI application, where
all of the pins have the same length. In this case, connect
an RC series circuit on the I/O card between VCC and
ENABLE. An RC product of 10ms provides a filter to
prevent the LTC4300-1 from becoming activated until the
transients associated with hot swapping have settled.
Figure 8 shows the LTC4300-2 in an application where the
user has a custom connector with pins of three different
lengths available. Making VCC2 the shortest pin ensures
that all other pins are firmly connected before VCC2
receives any voltage. A filtered UVLO circuit on VCC2
ensures that the VCC2 pin is firmly connected before the
LTC4300-2 connects the backplane to the card.
Repeater/Bus Extender Application
Users who wish to connect two 2-wire systems separated
by a distance can do so by connecting two LTC4300-1s
back-to-back, as shown in Figure 9. The I2C specification
allows for 400pF maximum bus capacitance, severely
limiting the length of the bus. The SMBus specification
places no restriction on bus capacitance, but the limited
impedances of devices connected to the bus require
systems to remain small if rise- and fall-time specifica-
tions are to be met. The strong pull-up and pull-down
impedances of the LTC4300-1 are capable of meeting rise-
and fall-time specifications for one nanofarad of capaci-
tance, thus allowing much more interconnect distance. In
this situation, the differential ground voltage between the
two systems may limit the allowed distance, because a
valid logic low voltage with respect to the ground at one
end of the system may violate the allowed VOL specifica-
tion with respect to the ground at the other end. In
addition, the connection circuitry offset voltages of the
back-to-back LTC4300-1s add together, directly contrib-
uting to the same problem.
Systems with Disparate Supply Voltages (LTC4300-1)
In large 2-wire systems, the VCC voltages seen by devices
at various points in the system can differ by a few hundred
millivolts or more. This situation is well modelled by a
series resistor in the VCC line, as shown in Figure 10. For
proper operation of the LTC4300-1, make sure that
VCC(BUS) ≥ VCC(LTC4300) – 0.5V.
5V to 3.3V Level Translator and Power Supply
Redundancy (LTC4300-2)
Systems requiring different supply voltages for the
backplane side and the card side can use the LTC4300-2,
as shown in Figure 11. The pull-up resistors on the card
side connect from SDAOUT to SCLOUT to VCC2, and those
on the backplane side connect from SDAIN and SCLIN to
VCC. The LTC4300-2 functions for voltages ranging from
2.7V to 5.5V on both VCC and VCC2. There is no constraint
on the voltage magnitudes of VCC and VCC2 with respect to
each other.
This application also provides power supply redundancy.
If either the VCC or VCC2 voltage falls below its UVLO
threshold, the LTC4300-2 disconnects the backplane from
the card, so that the side that is still powered can continue
to function.
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11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC4300-1.PDF ] | |
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