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PDF LVPXA272FC0156 Data sheet ( Hoja de datos )
| Número de pieza | LVPXA272FC0156 | |
| Descripción | PXA27x Processor Family | |
| Fabricantes | Intel | |
| Logotipo |  |
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Intel® PXA27x Processor Family
Electrical, Mechanical, and Thermal Specification
Data Sheet
■ High-performance processor:
— Intel XScale® microarchitecture with
Intel® Wireless MMX™ Technology
— 7 Stage pipeline
— 32 KB instruction cache
— 32 KB data cache
— 2 KB “mini” data cache
— Extensive data buffering
■ 256 Kbytes of internal SRAM for high
speed code or data storage preserved
during low-power states
■ High-speed baseband processor interface
(Mobile Scalable Link)
■ Rich serial peripheral set:
— AC’97 audio port
— I2S audio port
— USB Client controller
— USB Host controller
— USB On-The-Go controller
— Three high-speed UARTs (two with
hardware flow control)
— FIR and SIR infrared communications
port
■ Hardware debug features — IEEE JTAG
interface with boundary scan
■ Hardware performance-monitoring
features with on-chip trace buffer
■ Real-time clock
■ Operating-system timers
■ LCD Controller
■ Universal Subscriber Identity Module
interface
■ Low power:
— Wireless Intel Speedstep® Technology
— Less than 500 mW typical internal
dissipation
— Supply voltage may be reduced to
0.85 V
— Four low-power modes
— Dynamic voltage and frequency
management
■ High-performance memory controller:
— Four banks of SDRAM: up to 104 MHz
@ 1.8 V I/O interface
— Six static chip selects
— Support for PCMCIA and Compact
Flash
— Companion chip interface
■ Flexible clocking:
— CPU clock from 104 to 520 MHz
— Flexible memory clock ratios
— Frequency changes
— Functional clock gating
■ Additional peripherals for system
connectivity:
— SD Card / MMC Controller (with SPI
mode support)
— Memory Stick card controller
— Three SSP controllers
— Two I2C controllers
— Four pulse-width modulators (PWMs)
— Keypad interface with both direct and
matrix keys support
— Most peripheral pins double as GPIOs
Order Number 280003-001
1 page  
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Intel® PXA27x Processor Family
Contents
Tables
6-13 Eight-Beat Burst Read from 16-Bit Burst-of-Four ROM or Flash Timing..........6-22
6-14 16-bit ROM/Flash/SRAM Read for 4/2/1 Bytes Timing ....................................6-23
6-15 Synchronous Flash Burst-of-Eight Read Timing ..............................................6-26
6-16 Synchronous Flash Stacked Burst-of-Eight Read Timing ................................6-27
6-17 First-Access Latency Configuration Timing......................................................6-28
6-18 Synchronous Flash Burst Read Example.........................................................6-30
6-19 32-Bit Flash Write Timing .................................................................................6-31
6-20 32-Bit Stacked Flash Write Timing ...................................................................6-32
6-21 16-Bit Flash Write Timing .................................................................................6-33
6-22 32-Bit SRAM Write Timing ...............................................................................6-35
6-23 16-bit SRAM Write for 4/2/1 Byte(s) Timing .....................................................6-36
6-24 32-Bit VLIO Read Timing .................................................................................6-38
6-25 32-Bit VLIO Write Timing..................................................................................6-39
6-26 Expansion-Card Memory or I/O 16-Bit Access Timing.....................................6-41
6-27 Expansion-Card Memory or I/O 16-Bit Access to 8-Bit Device Timing ............6-42
6-28 LCD Timing Definitions.....................................................................................6-43
6-29 SSP Master Mode Timing Definitions...............................................................6-44
6-30 Timing Diagram for SSP Slave Mode Transmitting Data to an External
Peripheral .........................................................................................................6-44
6-31 Timing Diagram for SSP Slave Mode Receiving Data from External
Peripheral .........................................................................................................6-45
6-32 JTAG Boundary-Scan Timing...........................................................................6-46
1-1 Supplemental Documentation ............................................................................1-2
3-1 Intel® PXA27x Processor Family Package Information .....................................3-2
3-2 Processor Material Properties ............................................................................3-3
3-3 Intel® PXA27x Processor Family ID Markings ...................................................3-5
4-1 1x256Mbit(x16) Flash and 1x256Mbit(x16) SDRAM - 1.8V ...............................4-7
4-2 2x256 Mbit(x32) (x16 each die) Flash - 1.8V ...................................................4-10
4-3 2x128Mbit(x32) (x16 each die) Flash - 1.8V ....................................................4-14
4-4 SCSP Pin Usage Summary..............................................................................4-17
4-5 Pin Usage and Mapping Notes.........................................................................4-31
4-6 Signal Types.....................................................................................................4-32
4-7 Memory Controller Pin Reset Values ...............................................................4-32
4-8 SCSP 1.8V Power Supply Pin Summary .........................................................4-33
5-1 Absolute Maximum Ratings................................................................................5-1
5-2 Voltage, Temperature, and Frequency Electrical Specifications........................5-2
5-3 Memory Voltage and Frequency Electrical Specifications .................................5-3
5-4 Core Voltage and Frequency Electrical Specifications.......................................5-4
5-5 Internally Generated Power Domain Descriptions .............................................5-5
5-6 Core Voltage Specifications For Lower Power Modes .......................................5-5
5-7 Standard Input, Output, and I/O Pin DC Operating Conditions ..........................5-6
5-8 Typical 32.768-kHz Crystal Requirements .........................................................5-7
5-9 Typical External 32.768-kHz Oscillator Requirements .......................................5-8
5-10 Typical 13.000-MHz Crystal Requirements........................................................5-8
5-11 Typical External 13.000-MHz Oscillator Requirements......................................5-9
5-12 CLK_PIO Specifications .....................................................................................5-9
5-13 CLK_TOUT Specifications .................................................................................5-9
5-14 48 MHz Output Specifications ..........................................................................5-10
Electrical, Mechanical, and Thermal Specification
v
5 Page 
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Package Information
3
This chapter provides the mechanical specifications for the Intel® PXA27x Processor Family (Intel
PXA27x processor family).
3.1 Package Information
Figure 3-1. 14 x 14 mm Intel® PXA27x Processor Family Package, Top View
A1 Corner
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
The Intel PXA27x processor family has the following characteristics:
• Ball pitch: 0.65mm
• Ball diameter: 0.30 mm
• Substrate thickness: 0.21 mm
• Mold thickness: 0.45 mm
The Intel PXA27x processor family is packaged in a 14- by 14-mm, 336-pin, 0.65-mm package, as
shown in Figure 3-2 and Figure 3-3.
Refer to Table 3-1 for package configuration information for Figure 3-1 and Figure 3-2.
Electrical, Mechanical, and Thermal Specification
3-1
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