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PDF LP2975AIMMX-12 Data sheet ( Hoja de datos )
| Número de pieza | LP2975AIMMX-12 | |
| Descripción | MOSFET LDO Driver/Controller | |
| Fabricantes | National Semiconductor | |
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September 1997
LP2975
MOSFET LDO Driver/Controller
General Description
A high-current LDO regulator is simple to design with the
LP2975 LDO Controller. Using an external P-FET, the
LP2975 will deliver an ultra low dropout regulator with ex-
tremely low quiescent current.
High open loop gain assures excellent regulation and ripple
rejection performance.
The trimmed internal bandgap reference provides precise
output voltage over the entire operating temperature range.
Dropout voltage is “user selectable” by sizing the external
FET: the minimum input-output voltage required for opera-
tion is the maximum load current multiplied by the RDS(ON)
of the FET.
Overcurrent protection of the external FET is easily imple-
mented by placing a sense resistor in series with VIN. The
57 mV detection threshold of the current sense circuitry mini-
mizes dropout voltage and power dissipation in the resistor.
The standard product versions available provide output volt-
ages of 12V, 5V, or 3.3V with guaranteed 25˚C accuracy of
1.5% (“A” grade) and 2.5% (standard grade).
Features
n Simple to use, few external components
n Ultra-small mini SO-8 package
n 1.5% (A grade) precision output voltage
n Low-power shutdown input
n < 1 µA in shutdown
n Low operating current (180 µA typical @ VIN = 5V)
n Wide supply voltage range (1.8V to 24V)
n Built-in current limit amplifier
n Overtemperature protection
n 12V, 5V, and 3.3V standard output voltages
n Can be programmed using external divider
n −40˚C to +125˚C junction temperature range
Applications
n High-current 5V to 3.3V regulator
n Post regulator for switching converter
n Current-limited switch
Block Diagram
Connection Diagram
Surface Mount Mini SO-8 Package
DS100034-2
Top View
For Order Numbers
See Table 1 of this Document
See NS Package Number MUA08A
DS100034-1
*RSET values are: 208k for 12V part, 72.8k for 5V part, and 39.9k for 3.3V
part.
© 1999 National Semiconductor Corporation DS100034
www.national.com
1 page  
Typical Performance Characteristics Unless otherwise specified: TA = 25˚C, CIN = 1 µF, ON/OFF pin
is tied to 1.5V.
Minimum Operating Voltage
VIN Referred Gate Clamp Voltage
ON/OFF Threshold
DS100034-5
Current Limit Sense Voltage
DS100034-6
ON/OFF Pin Current
DS100034-7
Supply Current
DS100034-8
DS100034-9
5
DS100034-10
www.national.com
5 Page 
Application Hints (Continued)
FET in low power designs. Because of the increased cell
density (and tiny packages) used by modern FET’s, the cur-
rent carrying capability may easily exceed the power dissipa-
tion limits of the package. It is possible to parallel two or
more FET’s, which divides the power dissipation among all
of the packages.
It should be noted that the “heatsink” for a surface mount
package is the copper of the PC board and the package itself
(direct radiation).
Surface-mount devices have the value of θJ-A specified for a
typical PC board mounting on their data sheet. In most cases
it is best to start with the known data for the application (PD,
TA, TJ) and calculate the required value of θJ-A needed. This
value will define the type of FET and, possibly, the heatsink
required for cooling.
θJ-A = (TJ − TA)/PD(MAX)
DESIGN EXAMPLE: A design is to be done with VIN = 5V
and VOUT = 3.3V with a maximum load current of 300 mA.
Based on these conditions, power dissipation in the FET dur-
ing normal operation would be:
PD = (VIN − VOUT) x ILOAD
Solving, we find that PD = 0.51W. Assuming that the maxi-
mum allowable value of TJ is 150˚C and the maximum TA is
70˚C, the value of θJ-A is found to be 157˚C/W.
However, if this design must survive a continuous short on
the output, the power dissipated in the FET is higher:
PD(SC) = VIN x ISC = 5 x 0.33 = 1.65W
(This assumes the current sense resistor is selected for an
ISC value that is 10% higher than the required 0.3A).
The value of θJ-A required to survive continuous short circuit
is calculated to be 49˚C/W.
Having solved for the value(s) of θJ-A, a FET can be se-
lected. It should be noted that a FET must be used with a
θJ-A value less than or equal to the calculated value.
HIGH POWER (≥2W) APPLICATIONS: As power dissipa-
tion increases above 2W, a FET in a larger package must be
used to obtain lower values of θJ-A. The same formulae de-
rived in the previous section are used to calculate PD and
θJ-A.
Having found θJ-A, it becomes necessary to calculate the
value of θS-A (the heatsink-to-ambient thermal resistance) so
that a heatsink can be selected:
Where:
θS-A = θJ-A − (θJ-C + θC-S)
θJ-C is the junction-to-case thermal resistance. This pa-
rameter is the measure of thermal resistance between the
semiconductor die inside the FET and the surface of the
case of the FET where it mounts to the heatsink (the value of
θJ-C can be found on the data sheet for the FET). A typical
FET in a TO-220 package will have a θJ-C value of approxi-
mately 2–4˚C/W, while a device in a TO-3 package will be
about 0.5–2˚C/W.
θC-S is the case-to-heatsink thermal resistance, which
measures how much thermal resistance exists between the
surface of the FET and the heatsink. θC-S is dependent on
the package type and mounting method. A TO-220 package
with mica insulator and thermal grease secured to a heatsink
will have a θC-S value in the range of 1–1.5˚C/W. A TO-3
package mounted in the same manner will have a θC-S value
of 0.3–0.5˚C/W. The best source of information for this is
heatsink catalogs (Wakefield, AAVID, Thermalloy) since they
also sell mounting hardware.
θS-A is the heatsink-to-ambient thermal resistance, which
defines how well a heatsink transfers heat into the air. Once
this is determined, a heatsink must be selected which has a
value which is less than or equal to the computed value. The
value of θS-A is usually listed in the manufacturer’s data
sheet for a heatsink, but the information is sometimes given
in a graph of temperature rise vs. dissipated power.
DESIGN EXAMPLE: A design is to be done which takes
3.3V in and provides 2.5V out at a load current of 7A. The
power dissipation will be calculated for both normal opera-
tion and short circuit conditions.
For normal operation:
PD = (VIN − VOUT) x ILOAD = 5.6W
If the output is shorted to ground:
PD(SC) = VIN x ISC = 3.3 x 7.7 = 25.4W
(Assuming that a sense resistor is selected to set the value
of ISC 10% above the nominal 7A).
θJ-A will be calculated assuming a maximum TA of 70˚C and
a maximum TJ of 150˚C:
θJ-A = (TJ − TA)/PD(MAX)
For normal operation:
θJ-A = (150 − 70) / 5.6 = 14.3˚C/W
For designs which must operate with the output shorted to
ground:
θJ-A = (150 − 70) / 25.4 = 3.2˚C/W
The value of 14.3˚C/W can be easily met using a TO-220 de-
vice. Calculating the value of θS-A required (assuming a
value of θJ-C = 3˚C/W and θC-S = 1˚C/W):
θS-A = θJ-A − (θJ-C + θC-S)
θS-A = 14.3 − (3 + 1) = 10.3˚C/W
Any heatsink may be used with a thermal resistance ≤
10.3˚C/W @ 5.6W power dissipation (refer to manufacturer’s
data sheet curves). Examples of suitable heatsinks are Ther-
malloy #6100B and IERC #LATO127B5CB.
However, if the design must survive a sustained short on the
output, the calculated θJ-A value of 3.2˚C/W eliminates the
possibility of using a TO-220 package device.
Assuming a TO-3 device is selected with a θJ-C value of
1.5˚C/W and θC-S = 0.4˚C/W, we can calculate the required
value of θS-A:
θS-A = θJ-A − (θJ-C + θC-S)
θS-A = 3.2 − (1.5 + 0.4) = 1.3˚C/W
A θS-A value ≤1.3˚C/W would require a relatively large heat-
sink, or possibly some kind of forced airflow for cooling.
SHORT-CIRCUIT CURRENT LIMITING
Short-circuit current limiting is easiliy implemented using a
single external resistor (RSC). The value of RSC can be cal-
culated from:
Where:
RSC = VCL / ISC
ISC is the desired short circuit current.
VCL is the current limit sense voltage.
The value of VCL is 57 mV (typical), with guaranteed limits
listed in the Electrical Characteristics section. When doing a
worst-case calculation for power dissipation in the FET, it is
important to consider both the tolerance of VCL and the toler-
ance (and temperature drift) of RSC.
11 www.national.com
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