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PDF LP2966IMM-5050 Data sheet ( Hoja de datos )
| Número de pieza | LP2966IMM-5050 | |
| Descripción | Dual 150mA Ultra Low-Dropout Regulator | |
| Fabricantes | National Semiconductor | |
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April 2000
LP2966
Dual 150mA Ultra Low-Dropout Regulator
General Description
The LP2966 dual ultra low-dropout (LDO) regulator operates
from a +2.70V to +7.0V input supply. Each output delivers
150mA over full temperature range. The IC operates with ex-
tremely low drop-out voltage and quiescent current, which
makes it very suitable for battery powered and portable ap-
plications. Each LDO in the LP2966 has independent shut-
down capability. The LP2966 provides low noise perfor-
mance with low ground pin current in an extremely small
MSOP-8 package (refer to package dimensions and connec-
tion diagram for more information on MSOP-8 package). A
wide range of preset voltage options are available for each
output. In addition to the voltage combinations listed in the
ordering information table, many more are available upon re-
quest with minimum orders. In all, 256 voltage combinations
are possible.
Key Specifications
Dropout Voltage: Varies linearly with load current. Typically
0.9 mV at 1mA load current and 135mV at 150mA load cur-
rent.
Ground Pin Current: Typically 300µA at 1mA load current
and 340µA at 100mA load current (with one shutdown pin
pulled low).
Shutdown Mode: Less than 1µA quiescent current when
both shutdown pins are pulled low.
Error Flag: Open drain output, goes low when the corre-
sponding output drops 10% below nominal.
Precision Output Voltage: Multiple output voltage options
available ranging from 1.8V to 5.0V with a guaranteed accu-
racy of ±1% at room temperature.
Features
n Ultra low drop-out voltage
n Low ground pin current
n <1µA quiescent current in shutdown mode
n Independent shutdown of each LDO regulator
n Output voltage accuracy ±1%
n Guaranteed 150mA output current at each output
n Low output noise
n Error Flags indicate status of each output
n Available in MSOP-8 surface mount packages
n Low output capacitor requirements (1µF)
n Operates with Low ESR ceramic capacitors in most
applications
n Over temperature/over current protection
n -40˚C to +125˚C junction temperature range
Applications
n Cellular and Wireless Applications
n Palmtop/Laptop Computer
n GPS systems
n Flat panel displays
n Post regulators
n USB applications
n Hand held equipment and multimeters
n Wireless data terminals
n Other battery powered applications
Typical Application Circuit
DS100850-30
*SD1 and SD2 must be actively terminated through a pull up resistor. Tie to VIN if not used.
**ERROR1 and ERROR2 are open drain outputs. These pins must be connected to ground if not used.
# Minimum output capacitance is 1µF to insure stability over full load current range. More capacitance improves superior dynamic performance and provides
additional stability margin.
© 2000 National Semiconductor Corporation DS100850
www.national.com
1 page  
Electrical Characteristics (Continued)
Limits in standard typeface are for Tj = 25˚C, and limits in boldface type apply over the full operating junction temperature
range. Unless otherwise specified, VIN = VO(NOM) + 1V, (Note 16), COUT = 1µF, IOUT = 1mA, CIN = 1µF, VSD1 = VSD2 = VIN.
Symbol
Parameter
Conditions
Typ
(Note 4)
LP2966IMM (Note 5)
Min Max
Unit
Over Temperature Protection
Tsh(t)
Shutdown Threshold
165 ˚C
Tsh(h)
Thermal Shutdown
Hysteresis
25 ˚C
Shutdown Input
VSDT
TdOFF
TdON
ISD
Shutdown Threshold
(Note 15)
Turn-off Delay (Note 17)
Turn-on Delay (Note 17)
SD Input Current
Error Flag Comparators
Output = Low
Output = High
IL = 100 mA
IL = 100 mA
VSD = VIN
VSD = 0 V
0
VIN VIN - 0.1
20
25
1
1
0.1
V
µsec
µsec
nA
VT Threshold (output goes
high to low)
(Note 11)
10 5
16 %
VTH Threshold Hysteresis
(Note 11)
52
8%
VERR(Sat)
IEF(leak)
Error Flag Saturation
Error Flag Pin Leakage
Current
IFsink = 100µA
0.015
1
0.1 V
nA
I(EFsink)
AC Parameters
Error Flag Pin Sink Current
1
mA
PSRR
ρn(1/f)
Ripple Rejection
Output Noise Density
VIN = VOUT + 1V, f =
120Hz, VOUT = 3.3V
VIN = VOUT + 0.3V, f =
120Hz, VOUT = 3.3V
f =120Hz
60
40
1
dB
µV/√Hz
en
Output Noise Voltage (rms) BW = 10Hz − 100kHz,
150
COUT = 10µF
BW = 300Hz − 300kHz,
100
COUT = 10µF
µV(rms)
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is in-
tended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical characteristics. The guar-
anteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The device in the surface-mount package must be derated at θjA
= 235˚C/W, junction-to-ambient. Please refer to the applications section on maximum current capability for further information. The device has internal thermal pro-
tection.
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 4: : Typical numbers are at 25˚C and represent the most likely parametric norm.
Note 5: : Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Averaging Outgoing Quality Level (AOQL).
Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2966 output must be diode-clamped to ground.
Note 7: The output PMOS structure contains a diode between the VIN and VOUT terminals that is normally reverse-biased. Reversing the polarity from VIN and VOUT
will turn on this diode.
Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in input line voltage.
Note 9: Output voltage load regulation is defined as the change in output voltage from the nominal value when the load current changes from 1mA to 100mA.
Note 10: Output voltage cross regulation is defined as the percentage change in the output voltage from the nominal value at one output when the load current
changes from 1mA to full load in the other output. This is an important parameter in multiple output regulators. The specification for ∆VO1/∆IOUT2 is equal to the speci-
fication for ∆VO2/∆IOUT1.
Note 11: Error Flag threshold and hysteresis are specified as the percentage below the regulated output voltage.
Note 12: Dropout voltage is defined as the input to output differential at which the output voltage drops 100mV below the nominal value. Drop-out voltage specifi-
cation applies only to output voltages greater than 2.7V. For output voltages below 2.7V, the drop-out voltage is nothing but the input to output differential, since the
minimum input voltage is 2.7V.
Note 13: Output voltage tolerance specification also includes the line regulation and load regulation.
5 www.national.com
5 Page 
Typical Performance Characteristics Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 3.3V,
COUT =1µF, IOUT = 1mA, CIN =1µF, VSD1 = VSD2 = VIN, and TA = 25˚C. (Continued)
Output Voltage Cross-Coupling
Output Noise Density
Power Supply Ripple Rejection
DS100850-13
DS100850-14
Peak Output Current vs Temperature
DS100850-17
DS100850-41
11 www.national.com
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet LP2966IMM-5050.PDF ] | |
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