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PDF CY24488 Data sheet ( Hoja de datos )

Número de pieza CY24488
Descripción Quad PLL Clock Generator
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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CY24488
Quad PLL Clock Generator with Serial
Interface (I2C)
Features
Three output frequencies plus reference out
Programmable output frequencies via I2C serial interface
Output frequencies from 4.9152 to 148.5 MHz
Uses an external 27 MHz crystal or 27 MHz input clock
Optional analog VCXO
Programmable output drive strength to minimize EMI
The non-I2C equivalent is the CY22388 / 89 / 91
16-pin TSSOP package
3.3V operation with 2.5V output buffer option
Benefits
Meets most Digital Set Top Box, DVD Recorder, and DTV
application requirements
Multiple high-performance PLLs allow synthesis of
unrelated frequencies
Integration eliminates the need for external loop filter
components
Complete VCXO solution with ±120 ppm (typical pull range)
Block Diagram
XIN/CLKIN
XOUT
VIN
VCXO
SCLK
SDAT
Serial
Interface
&
Select
Logic
PLL1
PLL2
PLL3
PLL4
Dividers
&
Multiplexers
CLKC
CLKD
CLKE
CLKF
CLKG
Pin Configuration
XIN/CLKIN
SCLK
SDAT
VIN
VDD1
VSS
CLKC
CLKD
1
2
3
4
5
6
7
8
16 XOUT
15 AVDD
14 DNC
13 VDD2
12 VSS
11 CLKG
10 CLKF
9 CLKE
Table 1. Applications and Frequencies
Output Clock
CLKC
Application
Audio
CLKD
CLKE
CLKF
CLKG
iLink
HDMI
Video
USB
Video-Pixel Freq.
Modem
iLink
Video
Ethernet
PCI
Processor
see CLKC/D/E
see CLKC/D/E
Frequencies (MHz)
6.144, 8.192, 11.2896, 12.288, 16.384, 16.9344, 18.432, 22.5792, 24.576,
33.8688, 36.864
24.576
25.175, 28.322
27, 27.027, 54, 54.054, 81
12, 24, 48
74.25/1.001, 74.25, 148.5/1.001, 148.5
4.9152, 11.0592
24.576
13.5, 27, 54, 81, 108
25
33.3333, 66.6666
20, 30, 40, 50, 60, 80, 100
REFOUT or Copy of CLKC, CLKD or CLKE
REFOUT or Copy of CLKC, CLKD or CLKE
Cypress Semiconductor Corporation
Document #: 001-09608 Rev. *A
198 Champion Court San Jose, CA 95134-1709 408-943-2600
Revised October 31, 2006
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CY24488
Table 4. CLKC Output Frequencies (Audio, iLink, or HDMI)
Frequency (MHz)
CLKC off and PLL off
(default)
CLKC off
25.175
28.322
6.144 (48K x 128)
12.288 (32K x 384)
16.384 (32K x 512)
18.432 (48K x 384)
24.576 (48K x 512)
36.864 (48K x 768)
11.2896 (44.1K x 256)
16.9344 (44.1K x 384)
22.5792 (44.1K x 512)
33.8688 (44.1K x 768)
Application
Frequency
Error
––
0AH
HDMI
HDMI
Audio
Audio
Audio
Audio
Audio, iLink
Audio
Audio
Audio
Audio
Audio
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
01
10
17
17
17
17
17
17
17
17
17
17
0BH
07
39
3E
3E
3E
3E
3E
3E
3E
3E
3E
3E
Register Address
0CH
88
0DH
0EH
–––
D2 26 18
E2 94 39
D0 1C 06
D0 1C 06
D0 19 0E
D0 1C 06
D0 1C 06
D0 1C 06
D0 30 16
D0 30 16
D0 30 16
D0 30 16
0FH
44
48H[1]
8D
8D
72 AD
6A 91
64 A5
64 A9
64 81
64 89
64 B5
64 95
66 A5
66 85
66 A9
66 89
Table 5. CLKD Output Frequencies (Video, Pixel rate, USB, modem or iLink)
Frequency (MHz)
CLKD off and PLL off (default)
CLKD off
12
24
48
4.9152
11.0592
24.576
27 (reference)
27.027
54 (ref * 2)
54.054
74.25/1.001
74.25
81 (ref * 3)
148.5/1.001
148.5
Application
USB
USB
USB
Modem
Modem
iLink
Video
Video
Video
Video
Video pixel rate
Video pixel rate
Video
Video pixel rate
Video pixel rate
Frequency
Error
0 ppm
0 ppm
0 ppm
+38 ppm
+11 ppm
6 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
0 ppm
10H
01
07
07
18
39
56
7B
02
7B
59
00
00
59
00
Register Address
11H 12H
00
––
08 30
1E 30
1E 30
21 26
8F 28
8E 33
02
F2 33
0E 30
F2 33
F8 2C
03 22
07 30
F8 2C
03 22
50H
8E
8E
A2
86
8A
A2
A6
82
9A
86
8A
8A
96
96
B6
B2
B2
Note
1. Bits[7:6]controlCLKCdrivestrength.Thevaluesgiveninthistablecorrespondtoadrivestrengthsettingof‘10’.SeeTable 9 and Table 10.
Document #: 001-09608 Rev. *A
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CY24488
Absolute Maximum Conditions
Parameter
Description
AVDD/VDD1 Core Supply Voltage
/VDD2
VIN Input Voltage
TS Temperature, Storage
ESDHBM ESD Protection (Human Body Model)
UL-94
Flammability Rating
MSL
Moisture Sensitivity Level
Condition
Relative to VSS
Non-Functional
MIL-STD-883, Method 3015
V-0 @1/8 in.
16 TSSOP
Min.
–0.5
Max.
4.6
Unit
V
–0.5
–65
2000
VDD + 0.5 VDC
+125 °C
Volts
10 ppm
1
Pullable Crystal Specifications (for VCXO applications)[5]
Parameter
Description
Comments
FNOM
CLNOM
AT-cut Crystal
Nominal Load Capacitance
Parallel resonance, Fundamental mode
Order crystal at one specific CLNOM
0 ppm
R1
DL
F3SEPHI[6]
F3SEPLO[6]
Equivalent Series Resistance (ESR) Fundamental mode (CL = Series)
Crystal Drive Level
Nominal VDD @ 25°C over ±120 ppm Pull
Range
Third Overtone Separation from 3*FNOM Mechanical Third (High side of 3*FNOM)
Third Overtone Separation from 3*FNOM Mechanical Third (Low side of 3*FNOM)
Min.
11.4
240
Typ.
27
12
Max. Unit
MHz
12.6 pF
40
300 W
ppm
–120 ppm
Non-pullable Crystal Specifications (for non-VCXO applications)[5]
Parameter
Description
FNOM
CLNOM
AT-cut Crystal
Nominal Load Capacitance
R1 Equivalent Series Resistance (ESR)
DL Crystal Drive Level
Comments
Parallel resonance, Fundamental mode
Order crystal at one specific CLNOM
0 ppm
Fundamental mode (CL = Series)
Nominal VDD @ 25°C
Min.
10.7
Typ.
27
12
Max. Unit
MHz
14.0 pF
– – 40
– – 300 W
Recommended Operating Conditions
Parameter
AVDD
Core Operating Voltage
VDD1/VDD2 Output Operating Voltage
Description
TA
CLOAD
tPU
Ambient Temperature
Maximum Load Capacitance
Power up time for all VDDs reach minimum specified voltage (power ramps must be
monotonic)
Min.
3.0
3.0
2.3
–10
0.05
Typ.
3.3
3.3
2.5
Max.
3.6
3.6
2.7
70
15
500
Unit
V
V
V
°C
pF
ms
Notes
5. Device operates to following specs which are guaranteed by design.
6. Increased tolerance available from pull range less than ±120 PPM.
Document #: 001-09608 Rev. *A
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