|
|
PDF ICS477-05 Data sheet ( Hoja de datos )
| Número de pieza | ICS477-05 | |
| Descripción | Quad PLL | |
| Fabricantes | ICS | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ICS477-05 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
ICS477-05
Quad PLL with VCXO for HDTV
Description
The ICS477-05 generates five high-quality,
high-frequency clock outputs including two reference
outputs from a low frequency pullable crystal. It is
designed to replace crystals and crystal oscillators in
most electronic systems.
Using Phase-Locked-Loop (PLL) techniques, the
device runs from a fundamental mode, pullable crystal.
It can replace multiple crystals and oscillators, saving
board space and cost.
Features
• Packaged in 28-pin SSOP (QSOP)
• Available in Pb-free packaging
• Replaces a VCXO plus multiple crystals and
oscillators
• On-chip patented VCXO pull range 200 ppm
(minimum)
• Duty cycle of 45/55
• Operating voltage of 3.3V
• Advanced, low power, CMOS process
• Input crystal frequency of 27 MHz
• Five output clocks
• Industrial temperature range available
Block Diagram
VIN
27 MHz
Pullable
Crystal
X1
X2
Voltage
Controlled
Crystal
Oscillator
External capacitors
may be required
VDD
6
PLLA
PLLB
PLLC
PLLD
Divide
Logic
and
Output
Enable
Control
54.054M
74.175M
54M
2 27M
PDTS
10
GND
MDS 477-05 H
1
Revision 062404
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
1 page  
ICS477-05
Quad PLL with VCXO for HDTV
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85°C
Parameter
Symbol
Conditions
Min. Typ.
Operating Voltage
VDD
3.15
3.3
Supply Current
IDD No load
48
Power Down Current
IDDPD No load
0.5
Input High Voltage
Input Low Voltage
Output High Voltage
Output High Voltage
Output Low Voltage
Short Circuit Current
Input Capacitance, inputs
Nominal Output Impedance
Internal Pull-up Resistor
Internal Pull-down Resistor
VIH
VIL
VOH
VOH
VOL
IOS
CIN
ZOUT
RPUP
RPD
PDTS pin
PDTS pin
IOH = -4 mA
IOH = -12 mA
IOL = 12 mA
CLK output
PDTS pin
CLK outputs
2
VDD-0.4
2.4
±80
5
20
360
510
Max.
3.45
0.8
0.4
Units
V
mA
mA
V
V
V
V
V
mA
pF
Ω
kΩ
kΩ
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Input Frequency
Crystal Pullability
VCXO Gain
Output Rise Time
Output Fall Time
Clock Stabilization Time after
Power-up
fin Crystal input, Note 2
FP 0V< VIN < 3.3 V
K0 VIN = VDD/2 + 1 V
tOR 20% to 80%, Note 1
tOF 80% to 20%, Note 1
27 MHz
±100
ppm
150 ppm/V
1.2 ns
1.0 ns
10 ms
Cycle Jitter (short term jitter)
Long Term Jitter
tja
54.054M, 54M clocks
±200
1.0
ps
ns
74.175M clock
1.3 ns
27M reference clock
300 ps
Output Enable Time
PDTS high to output
locked to ±1%
250 µs
Output Disable Time
PDTS low to tri-state
20 ns
Note 1: Measured with a 15 pF load.
Note 2: With an ICS approved crystal.
MDS 477-05 H
5
Revision 062404
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet ICS477-05.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ICS477-05 | Quad PLL | ICS |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |