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PDF ICS9DBL411 Data sheet ( Hoja de datos )

Número de pieza ICS9DBL411
Descripción Four Output Differential Fanout Buffer
Fabricantes IDT 
Logotipo IDT Logotipo



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DATASHEET
Four Output Differential Fanout Buffer for
PCI Express Gen 1 & 2
ICS9DBL411
Recommended Application:
PCI-Express fanout buffer
Output Features:
• 4 - low power differential output pairs
• Individual OE# control of each output pair
Key Specifications:
• Output cycle-cycle jitter < 25ps additive
• Output to output skew: < 50ps
Features/Benefits:
• Low power differential fanout buffer for PCI-
Express and CPU clocks
• 20-pin MLF or TSSOP packaging
General Description:
The ICS9DBL411 is a 4 output lower power
differential buffer. Each output has its own OE#
pin. It has a maximum input frequency of 400 MHz.
Power Groups
Pin Number (TSSOP)
VDD
GND
9,18 10,17
45
Pin Number (MLF)
VDD
GND
6,15 7,14
12
Description
DIF(3:0)
Analog VDD & GND
Description
DIF(3:0)
Analog VDD & GND
Funtional Block Diagram
OE#(3:0)
4
DIF_INT
DIF_INC
STOP
LOGIC
4
DIF_LPR(3:0)
IDTTM/ICSTM Four Output Differential Buffer for PCI Express
1
1250A—07/31/07

1 page




ICS9DBL411 pdf
ICS9DBL411
Four Output Differential Buffer for PCI Express
Advance Information
Absolute Maximum Ratings
PARAMETER
SYMBOL
Maximum Supply Voltage
VDDxxx
Maximum Supply Voltage
VDDxxx_IO
Maximum Input Voltage
Minimum Input Voltage
Storage Temperature
VIH
VIL
Ts
Input ESD protection
ESD prot
CONDITIONS
Supply Voltage
Low-Voltage Differential I/O Supply
3.3V LVCMOS Inputs
Any Input
-
Human Body Model
MIN
0.99
Vss - 0.5
-65
2000
MAX
4.6
3.8
4.6
150
UNITS Notes
V 1,7
V 1,7
V 1,7,8
V 1,7
°C 1,7
V 1,7
Electrical Characteristics - Input/Supply/Common Output Parameters
PARAMETER
SYMBOL
CONDITIONS
MIN MAX
Ambient Operating Temp
Tambient
-
0 70
Supply Voltage
VDDxxx
Supply Voltage
3.135
3.465
UNITS
°C
V
Notes
1
1
Supply Voltage
VDDxxx_IO Low-Voltage Differential I/O Supply 0.99
3.465
V
1
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input Slew Rate - DIF_IN
Input Leakage Current
Operating Supply Current
Standby Current
Input Frequency
Pin Inductance
Input Capacitance
OE# latency
Tdrive_OE#
Tfall_OE#
Trise_OE#
VIHSE
VILSE
VIHDIF
VILDIF
dv/dt
IIN
IDD_3.3V
IDD_IO+100M
IDD_IO_400M
IDD_SB33
IDD_SBIO
Fi
Lpin
CIN
COUT
TOE#LAT
TDROE#
TFALL
TRISE
Single-ended inputs
Single-ended inputs
Differential inputs
Differential inputs
Measured differentially
VIN = VDD , VIN = GND
3.3V supply
VDD_IO supply @ fOP = 100MHz
VDD_IO supply @ fOP = 400MHz
3.3V supply, Input stopped
0.8V IO supply, Input stopped
VDD = 3.3 V
Logic Inputs
Output pin capacitance
Number of clocks to enable or
disable output from
assertion/deassertion of OE#
Output enable after
OE# de-assertion
Fall/rise time of OE# inputs
2
VSS - 0.3
600
VSS - 0.3
0.4
-5
33
1.5
1
VDD + 0.3
0.8
1.15
300
8
5
25
15
54
25
0.1
400
7
5
6
V
V
V
V
V/ns
uA
mA
mA
mA
mA
mA
MHz
nH
pF
pF
3 periods
10 ns
5 ns
5 ns
1
1
1
1
2
1
1
1
1
1
1
2
1
1
1
1
1
1
1
IDTTM/ICSTM Four Output Differential Buffer for PCI Express
5
1250A—07/31/07

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