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PDF CY7C65630 Data sheet ( Hoja de datos )
| Número de pieza | CY7C65630 | |
| Descripción | (CY7C65620 / CY7C65630) Low-Power USB 2.0 Hub Controller Family | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CY7C65630 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CY7C65620
CY7C65630
EZ-USB HX2LP™
Low Power USB 2.0 Hub Controller Family
EZ-USB HX2LP™ Low Power USB 2.0 Hub Controller Family
Features
■ USB 2.0 hub controller
■ Automotive and Industrial grade option (–40 °C to 85 °C)
■ Compliant with USB 2.0 specification
■ USB-IF certified: TID# 30000009
■ Windows Hardware Quality Lab (WHQL) Compliant
■ Up to four downstream ports supported
■ Supports bus powered and self powered modes
■ Single transaction translator (TT)
■ Bus power configurations
■ Fit, form, and function compatible with CY7C65640 and
CY7C65640A (TetraHub™)
■ Space saving 56-pin QFN
■ Single power supply requirement
❐ Internal regulator for reduced cost
■ Integrated upstream pull-up resistor
■ Integrated pull-down resistors for all downstream ports
Block Diagram –
CY7C65630
D+ D -
24 MHz
Crystal
USB 2.0 PHY
PLL
USB Upstream Port
■ Integrated upstream and downstream termination resistors
■ Integrated port status indicator control
■ 24 MHz external crystal (integrated phase-locked loop (PLL))
■ In-system EEPROM programming
■ Configurable with external SPI EEPROM:
❐ Vendor ID, Product ID, Device ID (VID/PID/DID)
❐ Number of active ports
❐ Number of removable ports
❐ Maximum power setting for high-speed and full-speed
❐ Hub controller power setting
❐ Power-on timer
❐ Overcurrent detection mode
❐ Enabled and disabled overcurrent timer
❐ Overcurrent pin polarity
❐ Indicator pin polarity
❐ Compound device
❐ Enable full-speed only
❐ Disable port indicators
❐ Ganged power switching
❐ Self and bus powered compatibility
❐ Fully configurable string descriptors for multiple language
support
For a complete list of related documentation, click here.
Serial
Interface
Engine
High-Speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
Hub Repeater
Transaction Translator
TT RAM
Routing Logic
USB Downstream Port 1
USB 2.0 Port Power Port
PHY
Control Status
USB Downstream Port 2
USB 2.0 Port Power Port
PHY
Control Status
USB Downstream Port 3
USB 2.0 Port Power Port
PHY
Control Status
USB Downstream Port 4
USB 2.0 Port Power Port
PHY
Control Status
D+ D- PWR#[1]
LED D+ D- PWR#[2]
LED D+ D- PWR#[3]
LED D+ D- PWR#[4]
LED
OVR#[1]
OVR#[2]
OVR#[3]
OVR#[4]
Errata: For information on silicon errata, see “Errata” on page 28. Details include trigger conditions, devices affected, and proposed workaround.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-08037 Rev. AC
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 14, 2015
1 page  
CY7C65620
CY7C65630
Introduction
EZ-USB HX2LP™ is Cypress’s next generation family of
high-performance, low-power USB 2.0 hub controllers. HX2LP is
an ultra low power single chip USB 2.0 hub controller with
integrated upstream and downstream transceivers, a USB serial
interface engine (SIE), USB hub control and repeater logic, and
TT logic. Cypress has also integrated many of the external
passive components, such as pull-up and pull-down resistors,
reducing the overall bill of materials required to implement a hub
design. The HX2LP portfolio consists of:
■ CY7C65630: 4-port/single transaction translator
This device option is for ultra low-power applications that require
four downstream ports. All four ports share a single transaction
translator. The CY7C65630 is available in 56 QFN and is also
pin-for-pin compatible with the CY7C65640.
■ CY7C65620: 2-port/single transaction translator
This device option is for a 2-port bus powered application. Both
ports share a single transaction translator. The CY7C65620 is
available in a 56 QFN.
All device options are supported by Cypress’s world class
reference design kits, which include board schematics, bill of
materials, Gerber files, Orcad files, and thorough design
documentation.
USB Serial Interface Engine
The serial interface engine (SIE) allows the
CY7C65620/CY7C65630 to communicate with the USB host.
The SIE handles the following USB activities independently of
the Hub Control Block.
■ Bit stuffing and unstuffing
■ Checksum generation and checking
■ TOKEN type identification
■ Address checking.
Hub Repeater
The hub repeater manages the connectivity between upstream
and downstream facing ports that are operating at the same
speed. It supports full- or low-speed connectivity and high-speed
connectivity. According to the USB 2.0 specification, the HUB
Repeater provides the following functions:
■ Sets up and tears down connectivity on packet boundaries
■ Ensures orderly entry into and out of the suspend state,
including proper handling of remote wakeups.
Transaction Translator
The TT translates data from one speed to another. A TT takes
high speed split transactions and translates them to full- or
low-speed transactions when the hub is operating at high-speed
(the upstream port is connected to a high-speed host controller)
and has full- or low-speed devices attached. The operating
speed of a device attached on a downstream facing port
determines whether the routing logic connects a port to the TT
or hub repeater. If a full- or low-speed device is connected to the
hub operating at high-speed, the data transfer route includes the
TT. If a high-speed device is connected to this high-speed hub,
the route only includes the repeater and no TT, because the
device and the hub are operating at the same speed. When the
hub is operating at full-speed (the upstream port is connected to
a full-speed host controller), a high-speed peripheral does not
operate at its full capability. These devices only work at
full-speed. Full- and low-speed devices connected to this hub
operate at their normal speed.
Applications
Typical applications for the HX2LP device family are:
■ Standalone hubs
■ Motherboard hubs
■ Monitor hubs
■ Advanced port replicators
■ Docking stations
■ Split-PC designs
■ External personal storage drives
■ Keyboard hubs
Functional Overview
The Cypress CY7C65620/CY7C65630 USB 2.0 Hubs are
high-performance, low system cost solutions for USB. The
CY7C65620/CY7C65630 USB 2.0 Hubs integrate 1.5 k
upstream pull-up resistors for full-speed operation and all
downstream 15 k pull-down resistors and series termination
resistors on all upstream and downstream D+ and D– pins. This
results in optimization of system costs by providing built-in
support for the USB 2.0 specification.
System Initialization
On power-up, the CY7C65620/CY7C65630 reads an external
SPI EEPROM for configuration information. At the most basic
level, this EEPROM has the vendor ID (VID), product ID (PID),
and device ID (DID) for the customer’s application. For more
specialized applications, other configuration options can be
specified. See Configuration Options on page 14 for more
details.
After reading the EEPROM, if VBUSPOWER (connected to
upstream VBUS) is high, CY7C65620/CY7C65630 enables the
pull-up resistor on D+ to indicate its presence to the upstream
hub, after which a USB bus reset is expected. During this reset,
CY7C65620/CY7C65630 initiates a chirp to indicate that it is a
high-speed peripheral. In a USB 2.0 system, the upstream hub
responds with a chirp sequence, and CY7C65620/CY7C65630
is in a high-speed mode, with the upstream D+ pull-up resistor
turned off. In USB 1.x systems, no such chirp sequence from the
upstream hub is seen, and CY7C65620/CY7C65630 operates
as a normal 1.x hub (operating at full-speed).
Enumeration
After a USB bus reset, CY7C65620/CY7C65630 is in an
unaddressed, unconfigured state (configuration value set to ’0’).
During the enumeration process, the host sets the hub's address
and configuration. After the hub is configured, the full hub
functionality is available.
Document Number: 38-08037 Rev. AC
Page 5 of 32
5 Page 
CY7C65620
CY7C65630
Default Descriptors
This section presents the different descriptors that are available. The following tables list the functionality of each descriptor.
Device Descriptor
The standard device descriptor for CY7C65620/CY7C65630 is based on the information found in the SPI EEPROM. The information
in the EEPROM overrides the default descriptor values. If no EEPROM is used, the CY7C65620/CY7C65630 enumerates with the
default descriptor values as shown in the following table. If a blank EEPROM is connected, the hub enumerates as vendor defined
class instead of a hub class. This is for the purpose of programming the EEPROM with the Cypress driver.
Byte
0
1
2,3
4
5
6
7
8,9
10,11
12, 13
14
15
16
17
Full Speed
0x12
0x01
0x0110
0x09
0x00
0x00
0x40
0x04B4
0x6560
0x0915
0x00
0x00
0x00
0x01
High Speed
0x12
0x01
0x0200
0x09
0x00
0x01
0x40
0x04B4
0x6560
0x0915
0x00
0x00
0x00
0x01
Field Name
bLength
bDescriptorType
bcdUSB
bDeviceClass
bDeviceSubClass
bDeviceProtocol
bMaxPacketSize0
wIdVendor
wIdProduct
wbcdDevice
iManufacturer
iProduct
iSerialNumber
bNumConfigurations
Description
18 bytes
DEVICE_DESCRIPTOR
USB specification 2.0 (1.1 if forced FS)
HUB
None
None
64 bytes
VID (overridden by what is defined in EEPROM)
PID (overridden by what is defined in EEPROM)
DID (overridden by what is defined in EEPROM)
Overridden by EEPROM
Overridden by EEPROM
Overridden by EEPROM
One configuration supported
Configuration Descriptor
Byte
0
1
2
4
5
6
7
8
Full Speed
0x09
0x02[4]/0x07[5]
0x0019
0x01
0x01
0x00
0xA0
0xE0
0x28
High Speed
0x09
0x02[4]/0x07[5]
0x0019
0x01
0x01
0x00
0xA0
0xE0
0x57[4]
Field Name
bLength
bDescriptorType
wTotalLength
bNumInterfaces
bConfigurationValue
iConfiguration
bmAttributes
bMaxPower
Description
9 bytes
CONFIG_DESCRIPTOR
Length of all other descriptors
1
The configuration to use
Index of string descriptor describing this configuration
Value depends on pin 45 - SELFPWR signal
SELFPWR = 0 yields 0xA0 and =1 yields 0xE0
Maximum power consumption of hub from the USB bus
Notes
4. Configured speed descriptor.
5. Other speed descriptor.
Document Number: 38-08037 Rev. AC
Page 11 of 32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CY7C65630.PDF ] | |
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