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PDF SIDB766760 Data sheet ( Hoja de datos )
| Número de pieza | SIDB766760 | |
| Descripción | Current-Sense MOSFET Evaluation Boar9 | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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SiDB766760
Vishay Siliconix
Current-Sense MOSFET Evaluation Board
FEATURES
D Facilitates Evaluation of Vishay Siliconix Current Sensing
Power MOSFETs Available in Three Different Packages
D Jumper Isolation to Select The Device Under Test
D Simple Two Resistor External Circuit for Each Variety
ORDERING INFORMATION
D SiDB766760
FIGURE 1. EVB Assembly
DESCRIPTION
This evaluation board (EVB) is loaded with the following
Vishay Siliconix current sensing MOSFETs: SUM60N08-07C,
(5-pin D2PAK), Si4730EY (single SO-8), and Si6862DQ (dual
TSSOP–8). Figure 1 shows the PC board assembly. A simple
electrical set-up allows users to evaluate the effect of these
parameters and operating condition variations:
a.
b.
c.
d.
RVIDGSSES, N,dgSraEai,tnec-cusurorruererncntetsevonlstaegreesistor
TA, ambient temperature
A basic demo set-up consisting of four connection
configuration variations allows users to compare the current
sensing capability of each package (Figures 2, 3, 4, and 5,
pages 4 and 5).
Using this EVB, users can devise various design experiments
to study device behavior patterns and characterize various
parameters for current sensing MOSFETs. Users can also
connect the current sense signal directly into the external
circuit to prototype the controller.
The electrical schematic diagram for the PC board is shown in
Appendix (A). The bill of material (BOM) for the PC board is
given in Appendix (B) and the board layout details are given in
Appendix (C).
The demonstration board layout is available in Gerber file format. Please contact your Vishay Siliconix sales representative or
distributor for a copy.
PIN CONFIGURATIONS
D2PAK-5
12345
G
KELVIN
DS
SENSE
Document Number: 72431
23-Oct-03
SENSE
KELVIN
S
G
1
2
3
4
SO-8
Top View
8D
7D
6D
5D
TSSOP-8
D 1D
S1 2
SENSE1 3
G4
Top View
8D
7 S2
6 SENSE2
5 KELVIN
www.vishay.com
1
1 page  
TEST SET-UP (CONT’D)
JP2, 3, 4
(pin 1, 2)
SiDB766760
Vishay Siliconix
FIGURE 4. Test Set-Up for TSSOP-8 Package — Channel 2 — Board Marking T1
CLICK HERE TO RETURN TO: PAGE 1
PAGE 2
Jumper
Shunts
TP 3
Document Number: 72431
23-Oct-03
FIGURE 5. Test Set-Up for TSSOP-8 Package — Channel 1 — Board Marking T1
www.vishay.com
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet SIDB766760.PDF ] | |
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