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PDF AM79574 Data sheet ( Hoja de datos )
| Número de pieza | AM79574 | |
| Descripción | Subscriber Line Interface Circuit | |
| Fabricantes | AMD | |
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Am79574
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
s Programmable constant resistance feed
s Line-feed characteristics independent of
battery variations
s Programmable loop-detect threshold
s On-chip switching regulator for low-power
dissipation
s Pin for external ground-key noise filter
capacitor available
BLOCK DIAGRAM
s Ground-key detect option available
s Two-wire impedance set by single external
impedance
s Polarity reversal feature
s Tip Open state for ground-start lines
s Test relay driver optional
s On-hook transmission
A(TIP)
HPA
HPB
Two-Wire
Interface
Ground-Key
Detector
Ring Relay Driver
Test Relay Driver
Input Decoder
and Control
B(RING)
DA
DB
VREG
L
VBAT
BGND
Signal
Transmission
Power-Feed
Controller
Switching
Regulator
Off-Hook
Detector
Ring-Trip Detector
CHS QBAT CHCLK
VCC VEE AGND
Notes:
1. Am79574—E0 and E1 inputs; ring and test relay drivers sourced internally to BGND.
2. Output amplifier current gain (K1) = 1000.
RINGOUT
TESTOUT
C1
C2
C3
C4
E1
E0
DET
GKFIL
VTX
RSN
RD
RDC
16855C-001
Publication# 16855 Rev: E Amendment: /0
Issue Date: October 1999
1 page  
ABSOLUTE MAXIMUM RATINGS
Storage temperature ......................... –55°C to +150°C
VCC with respect to AGND/DGND...... –0.4 V to +7.0 V
VEE with respect to AGND/DGND ...... +0.4 V to –7.0 V
VBAT with respect to AGND/DGND ..... +0.4 V to –70 V
Note: Rise time of VBAT (dv/dt) must be limited to 27 V/µs or
less when QBAT bypass = 0.33 µF.
BGND with respect to AGND/DGND.. +1.0 V to –3.0 V
A(TIP) or B(RING) to BGND:
Continuous..................................... –70 V to +1.0 V
10 ms (f = 0.1 Hz) .......................... –70 V to +5.0 V
1 µs (f = 0.1 Hz) .............................. –90 V to +10 V
250 ns (f = 0.1 Hz) ........................ –120 V to +15 V
Current from A(TIP) or B(RING)....................... ±150 mA
Voltage on RINGOUT ........BGND to 70 V above QBAT
Voltage on TESTOUT ........BGND to 70 V above QBAT
Current through relay drivers .............................60 mA
Voltage on ring-trip inputs
(DA and DB) ......................................... VBAT to 0 V
Current into ring-trip inputs.................................. ±10 mA
Peak current into regulator
Switch (L pin) ..............................................150 mA
Switcher transient peak off
Voltage on L pin ............................................+1.0 V
C4–C1, E1, CHCLK to
AGND/DGND ....................... –0.4 V to VCC + 0.4 V
Maximum power dissipation, (see note) ...... TA = 70°C
In 32-pin PLCC package..............................1.74 W
Note: Thermal limiting circuitry on-chip will shut down the
circuit at a junction temperature of about 165°C. The device
should never be exposed to this temperature. Operation
above 145°C junction temperature may degrade device
reliability. See the SLIC Packaging Considerations for more
information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices
Ambient temperature ............................. 0°C to +70°C*
VCC ..................................................... 4.75 V to 5.25 V
VEE.................................................. –4.75 V to –5.25 V
VBAT ...................................................... –40 V to –58 V
AGND/DGND.......................................................... 0 V
BGND with respect to
AGND/DGND ........................ –100 mV to +100 mV
Load Resistance on VTX to ground............. 10 kΩ min
Operating Ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
SLIC Products
5
5 Page 
11. Assumes the following ZT network:
VTX
300 kΩ
300 kΩ
RSN
30 pF
12. Tested with 0 Ω source impedance. 2 MΩ is specified for system design purposes only.
13. Group delay can be considerably reduced by using a ZT network such as that shown in Note 11 above. The network reduces
the group delay to less than 2 µs. The effect of group delay on linecard performance may be compensated for by using
QSLAC™ or DSLAC™ devices.
Table 1. SLIC Decoding
DET Output
State C3 C2 C1
Two-Wire Status
E0 = 1*
E1 = 0
E0 = 1*
E1 = 1
0 0 0 0 Open Circuit
Ring trip
Ring trip
1 0 0 1 Ringing
2 0 1 0 Active
Ring trip
Loop detector
Ring trip
Ground key
3 0 1 1 On-hook TX (OHT)
Loop detector
Ground key
4 1 0 0 Tip Open
5 1 0 1 Reserved
Loop detector
Loop detector
—
—
6
1 1 0 Active Polarity Reversal
Loop detector
Ground key
7
1 1 1 OHT Polarity Reversal
Loop detector
Ground key
Note:
* A logic Low on E0 disables the DET output into the Open Collector state.
Table 2. User-Programmable Components
ZT = 1000(Z2WIN – 2RF)
ZT is connected between the VTX and RSN pins. The fuse
resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current
amplifier pole and any external stray capacitance between
VTX and RSN must be taken into account.
ZRX
=
---Z----L----
G42L
•
---------------1---0---0---0----•-----Z---T----------------
ZT + 1000(ZL + 2RF)
ZRX is connected from VRX to the RSN pin, ZT is defined
above, and G42L is the desired receive gain.
RDC1 + RDC2 = 50(RFEED – 2RF)
CDC
=
1.5
ms
•
R-----D---C---1----+-----R----D---C---2-
RDC1 • RDC2
RDC1, RDC2, and CDC form the network connected to the
RDC pin. RDC1 and RDC2 are approximately equal.
RD
=
3---6---5-- ,
IT
CD
=
0---.--5-------m-----s
RD
RD and CD form the network connected from RD to –5 V and
IT is the threshold current between on hook and off hook.
SLIC Products
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AM79574.PDF ] | |
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