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PDF LTC3850 Data sheet ( Hoja de datos )
| Número de pieza | LTC3850 | |
| Descripción | 2-Phase Synchronous Step-Down Switching Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
n Dual, 180° Phased Controllers Reduce Required
Input Capacitance and Power Supply Induced Noise
n High Efficiency: Up to 95%
n RSENSE or DCR Current Sensing
n ±1% 0.8V Output Voltage Accuracy
n Phase-Lockable Fixed Frequency 250kHz to 780kHz
n Supports Pre-Biased Output
n Dual N-Channel MOSFET Synchronous Drive
n Wide VIN Range: 4V to 24V (30V for LTC3850I)
Operation
n Adjustable Soft-Start Current Ramping or Tracking
n Foldback Output Current Limiting
n Output Overvoltage Protection
n Power Good Output Voltage Monitor
n 28-Pin 4mm × 4mm, 4mm × 5mm QFN and Narrow
SSOP Packages
APPLICATIONS
n Notebook and Palmtop Computers
n Portable Instruments
n Battery-Operated Digital Devices
n DC Power Distribution Systems
L, LT, LTC, LTM, OPTI-LOOP and Burst Mode are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents, including 5481178, 5705919, 5929620, 6100678, 6144194, 6177787, 6304066, 6580258.
LTC3850/LTC3850-1
Dual, 2-Phase
Synchronous Step-Down
Switching Controller
DESCRIPTION
The LTC®3850 is a high performance dual synchronous
step-down switching regulator controller that drives all
N-channel power MOSFET stages. A constant-frequency
current mode architecture allows a phase-lockable fre-
quency of up to 780kHz. Power loss and supply noise are
minimized by operating the two controller output stages
out of phase.
OPTI-LOOP® compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values. The LTC3850 features a precision 0.8V
reference and a power good output indicator. A wide 4V to
24V (28V maximum/30V for LTC3850I) input supply range
encompasses most battery chemistries and intermediate
bus voltages.
Independent TK/SS pins for each controller ramp the
output voltages during start-up. Current foldback limits
MOSFET heat dissipation during short-circuit condi-
tions. The MODE/PLLIN pin selects among Burst Mode®
operation, pulse-skipping mode, or continuous inductor
current mode and allows the IC to be synchronized to an
external clock.
The LTC3850 is available in low profile 28-pin 4mm × 4mm,
4mm × 5mm QFN and narrow SSOP packages.
TYPICAL APPLICATION
VOUT1
3.3V
5A
High Efficiency Dual 3.3V/2.5V Step-Down Converter
2.2µH
2.2k
63.4k
100µF
6V
0.1µF
VIN PGOOD INTVCC
TG1 TG2
500kHz
BOOST1
BOOST2
SW1
LTC3850
BG1
SW2
BG2
MODE/PLLIN
PGND
ILIM FREQ/PLLFLTR
0.1µF
SENSE1+
RUN1
SENSE1–
VFB1
SENSE2+
RUN2
SENSE2–
VFB2
ITH1 ITH2
220pF
TK/SS1 SGND TK/SS2
20k 15k
0.1µF
0.1µF
4.7µF
0.1µF
22µF
50V
2.2µH
2.2k
0.1µF
10nF
10k
220pF
43.2k
15k 20k
VIN
7V TO
24V
VOUT2
2.5V
5A
100µF
6V
38501 TA01
Efficiency
100
95
VIN = 12V
VOUT = 3.3V
90
EFFICIENCY
85
80
75
70
65 POWER LOSS
60
55
50
10
100 1000
LOAD CURRENT (mA)
10000
1000
100
10
10000
38501 TA01b
38501fc
1
1 page  
LTC3850/LTC3850-1
E LECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 15V, VRUN1,2 = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Oscillator and Phase-Locked Loop
fNOM Nominal Frequency
fLOW Lowest Frequency
fHIGH Highest Frequency
RMODE/PLLIN MODE/PLLIN Input Resistance
IFREQ
Phase Detector Output Current
Sinking Capability
Sourcing Capability
PGOOD Output
VFREQ = 1.2V
VFREQ = 0V
VFREQ ≥ 2.4V
fMODE < fOSC
fMODE > fOSC
450 500 550
210 250 290
700 780 860
250
–13
13
kHz
kHz
kHz
kΩ
µA
µA
VPGL
IPGOOD
VPG
PGOOD Voltage Low
PGOOD Leakage Current
PGOOD Trip Level
IPGOOD = 2mA
VPGOOD = 5V
VFBVVwFFBBitRRhaaRmmeppsiipnneggctNPtoeogsiSattievivteeRegulated Voltage
0.1 0.3
±2
–5 – 7.5 –10
5 7.5 10
V
µA
%
%
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3850E/LTC3850E-1 are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3850I/LTC3850I-1 are
guaranteed to meet performance specifications over the –40°C to 85°C
operating temperature range.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC3850GN: TJ = TA + (PD • 95°C/W)
LTC3850UF: TJ = TA + (PD • 37°C/W)
LTC3850UFD: TJ = TA + (PD • 43°C/W)
Note 4: The LTC3850 is tested in a feedback loop that servos VITH1,2 to a
specified voltage and measures the resultant VFB1,2.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 7: The minimum on-time condition is specified for an inductor
peak-to-peak ripple current ≥40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
Note 8: VSENSE(MAX) defaults to 50mV typical for the LTC3850-1.
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Output Current
and Mode
100
90
VIN = 12V
VOUT = 1.8V
80
BURST
70
60 DCM
50
40
30 CCM
20
10
0
10 100 1000
LOAD CURRENT (mA)
CIRCUIT OF FIGURE 14
10000
38501 G01
Efficiency vs Output Current
and Mode
100
90 BURST
80
70
60 DCM
50
40
30 CCM
20
10
0
10
VIN = 12V
VOUT = 3.3V
100
1000
10000
LOAD CURRENT (mA)
CIRCUIT OF FIGURE 14
38501 G02
Efficiency and Power Loss
vs Input Voltage
100 VOUT = 3.3V
IOUT = 2A
95
EFFICIENCY
90
POWER LOSS
85
80
5
10 15 20
INPUT VOLTAGE (V)
CIRCUIT OF FIGURE 14
2000
1500
1000
500
0
25
38501 G03
38501fc
5
5 Page 
LTC3850/LTC3850-1
OPERATION
Main Control Loop
The LTC3850 is a constant-frequency, current mode step-
down controller with two channels operating 180 degrees
out-of-phase. During normal operation, each top MOSFET
is turned on when the clock for that channel sets the RS
latch, and turned off when the main current comparator,
ICMP, resets the RS latch. The peak inductor current at
which ICMP resets the RS latch is controlled by the voltage
on the ITH pin, which is the output of each error ampli-
fier EA. The VFB pin receives the voltage feedback signal,
which is compared to the internal reference voltage by the
EA. When the load current increases, it causes a slight
decrease in VFB relative to the 0.8V reference, which in
turn causes the ITH voltage to increase until the average
inductor current matches the new load current. After the
top MOSFET has turned off, the bottom MOSFET is turned
on until either the inductor current starts to reverse, as
indicated by the reverse current comparator IREV, or the
beginning of the next cycle.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTVCC pin. When
the EXTVCC pin is left open or tied to a voltage less than
4.7V, an internal 5V linear regulator supplies INTVCC power
from VIN. If EXTVCC is taken above 4.7V, the 5V regulator is
turned off and an internal switch is turned on connecting
EXTVCC. Using the EXTVCC pin allows the INTVCC power
to be derived from a high efficiency external source such
as one of the LTC3850 switching regulator outputs.
Each top MOSFET driver is biased from the floating boot-
strap capacitor CB, which normally recharges during each
off cycle through an external diode when the top MOSFET
turns off. If the input voltage VIN decreases to a voltage
close to VOUT, the loop may enter dropout and attempt
to turn on the top MOSFET continuously. The dropout
detector detects this and forces the top MOSFET off for
about one-twelfth of the clock period every third cycle to
allow CB to recharge. However, it is recommended that a
load be present during the drop-out transition to ensure
CB is recharged.
Shutdown and Start-Up (RUN1, RUN2 and TK/SS1,
TK/SS2 Pins)
The two channels of the LTC3850 can be independently
shut down using the RUN1 and RUN2 pins. Pulling either
of these pins below 1.2V shuts down the main control
loop for that controller. Pulling both pins low disables both
controllers and most internal circuits, including the INTVCC
regulator. Releasing either RUN pin allows an internal
0.5µA current to pull up the pin and enable that control-
ler. Alternatively, the RUN pin may be externally pulled up
or driven directly by logic. Be careful not to exceed the
Absolute Maximum Rating of 6V on this pin.
The start-up of each controller’s output voltage VOUT is
controlled by the voltage on the TK/SS1 and TK/SS2 pins.
When the voltage on the TK/SS pin is less than the 0.8V
internal reference, the LTC3850 regulates the VFB voltage
to the TK/SS pin voltage instead of the 0.8V reference. This
allows the TK/SS pin to be used to program a soft-start
by connecting an external capacitor from the TK/SS pin
to SGND. An internal 1.3µA pull-up current charges this
capacitor, creating a voltage ramp on the TK/SS pin. As the
TK/SS voltage rises linearly from 0V to 0.8V (and beyond),
the output voltage VOUT rises smoothly from zero to its final
value. Alternatively the TK/SS pin can be used to cause the
start-up of VOUT to “track” that of another supply. Typically,
this requires connecting to the TK/SS pin an external resistor
divider from the other supply to ground (see the Applica-
tions Information section). When the corresponding RUN
pin is pulled low to disable a controller, or when INTVCC
drops below its undervoltage lockout threshold of 3V, the
TK/SS pin is pulled low by an internal MOSFET. When in
undervoltage lockout, both controllers are disabled and
the external MOSFETs are held off.
Light Load Current Operation (Burst Mode Operation,
Pulse-Skipping, or Continuous Conduction)
The LTC3850 can be enabled to enter high efficiency Burst
Mode operation, constant-frequency pulse-skipping mode,
or forced continuous conduction mode. To select forced
continuous operation, tie the MODE/PLLIN pin to a DC
voltage below 0.8V (e.g., SGND). To select pulse-skipping
mode of operation, tie the MODE/PLLIN pin to INTVCC. To
select Burst Mode operation, float the MODE/PLLIN pin.
38501fc
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC3850.PDF ] | |
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