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Número de pieza ASM1232LP
Descripción 5V uP Power Supply Monitor and Reset Circuit
Fabricantes Alliance Semiconductor 
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January 2005
ASM1232LP/LPS
rev 1.5
5V µP Power Supply Monitor and Reset Circuit
General Description
The ASM1232LP/LPS is a fully integrated microprocessor
supervisor. It can halt and restart a “hung-up” microprocessor,
restart a microprocessor after a power failure. It has a
watchdog timer and external reset override.
• Low-cost surface mount packages: 8-pin/16-pin SO, 8-pin
DIP and 8-pin Micro SO packages
• Wide operating temperature -40°C to +85°C (N suffixed
devices)
Applications
A precision temperature-compensated reference and
comparator circuits monitor the 5V, VCC input voltage status.
During power-up or when the VCC power supply falls outside
selectable tolerance limits, both RESET and RESET become
active. When VCC rises above the threshold voltage, the reset
signals remain active for an additional 250ms minimum,
allowing the power supply and system microprocessor to
stabilize. The trip point tolerance signal, TOL, selects the trip
level tolerance to be either 5% or 10%.
• Microprocessor Systems
• Computers
• Controllers
• Portable Equipment
• Intelligent Instuments
• Automotive Systems
Typical Operating Circuit
Each device has both a push-pull, active HIGH reset output
and an open drain active LOW reset output. A debounced
manual reset input, PBRST, activates the reset outputs for a
minimum period of 250ms.
There is a watchdog timer to stop and restart a microprocessor
that is “hung-up”. The watchdog timeouts periods are
selectable: 150ms, 610ms and 1200ms. If the ST input is not
strobed LOW before the time-out period expires, a reset is
generated.
ASM1232LP/LPS
ST
RESET
GND TD TOL
+5V
10k
µP
I/O
RESET
Devices are available in 8-pin DIP, 16-pin SO and compact 8-
pin MicroSO packages.
Block Diagram
Key Features
• 5V supply monitor
• Selectable watchdog period
• Debounce manual push-button reset input
• Precision temperature-compensated voltage reference
and comparator.
• Power-up, power-down and brown out detection
• 250ms minimum reset time
• Active LOW open drain reset output and active HIGH
push-pull output
• Selectable trip point tolerance: 5% or 10%
VCC
TOL
PBRST
TD
ST
ASM1232LP/LPS
Tolerance Selection
Reference
VCC
40k
Push Button
Debounce
Voltage Sense
Comparators
Watchdog Transition
Detector
+
-
Reset &
Watchdog Timer
RESET
RESET
GND
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice

1 page




ASM1232LP pdf
January 2005
rev 1.5
Absolute Maximum Ratings
ASM1232LP/LPS
Parameter
Min Max Unit
Voltage on VCC
Voltage on ST, TD
Voltage on PBRST, RESET, RESET
Operating Temperature Range (N suffixed devices)
Operating Temperature Range (others)
Soldering Temperature (for 10 sec)
-0.5 7 V
-0.5
VCC + 0.5
V
-0.5
VCC + 0.5
V
-40 +85 °C
0 70 °C
+260
°C
Storage Temperature
-55
+125
°C
ESD rating
HBM
MM
2 KV
200 V
Note:
1. Voltages are measured with respect to ground
2. These are stress ratings only and functional implication is not implied. Exposure to absolute maximum ratings for extended
periods may affect device reliability.
DC Electrical Characteristics
Unless otherwise stated, 4.5V <= VCC<= 5.5V and over the operating temperature range of 0°C to 70°C (-40°C to +85°C. for N devices). All
voltages are referenced to ground.
Parameter
Supply Voltage
ST and PBRST Input High Level
ST and PBRST Input Low Level
VCC Trip Point (TOL = GND)
VCC Trip Point (TOL = VCC)
Watchdog Timeout Period
Watchdog Timeout Period
Watchdog Timeout Period
Output Voltage
Output Current
Output Current
Symbol
VCC
VIH
VIL
VCCTP
VCCTP
tTD
tTD
tTD
VOH
IOH
IOL
Conditions
TD = GND
TD = VCC
TD Floating
I=-500µA, Note 3
Output = 2.4V, Note 2
Output = 0.4V
Min
4.5
2
-0.3
4.50
4.25
62.5
500
250
VCC - 0.5
-8
10
Typ
4.62
4.37
150
1200
610
VCC - 0.1
-10
Max
5.5
VCC + 0.3
0.8
4.74
4.49
250
2000
1000
Unit
V
V
V
V
V
ms
ms
ms
V
mA
mA
5V µP Power Supply Monitor and Reset Circuit
Notice: The information in this document is subject to change without notice
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