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PDF AKD4115-A Data sheet ( Hoja de datos )
| Número de pieza | AKD4115-A | |
| Descripción | Evaluation Board | |
| Fabricantes | Asahi Kasei Microsystems | |
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[AKD4115-A]
AKD4115-A
AK4115 Evaluation Board Rev.3
GENERAL DESCRIPTION
AKD4115 is the evaluation board for AK4115, 192kHz digital audio transceiver. This board has optical,
cannon connector (XLR), and BNC connectors to interface with other digital audio equipment.
Ordering guide
AKD4115-A ---
Evaluation board for AK4115
(A cable for connecting the printer port (parallel port) of IBM-AT compatible PC
and control software are packed with this document. Please note that the control
software does not operate on Windows NT)
FUNCTION
Digital interface
-S/PDIF :
8 channel input (optical, BNC or XLR)
2 channel output (optical, BNC or XLR)
- Serial audio data I/F :
1 input (for DIT data input. 10-pin port)
1 output (for DIR data output. 10-pin port)
-B,C,U,V bit :
1 input/output port (10-pin port)
-Serial control data I/F
1 input/output port (10-pin port)
Opt
RX0
5V REG
3.3V
GND
Control
RX1
RX7
Opt
TX0
TX1
AK4115
B,C,U,V
Serial Data in
Serial Data out
(To DIT)
(From DIR
Figure 1. AKD4115-A Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
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ASAHI KASEI
[AKD4115-A]
d. Set-up of CM1 and CM0
The operation mode of PLL is selected by CM1 and CM0. In parallel mode, it can be selected by SW3_4, SW3_1
and JP18. In serial mode, it can be selected by PSEL bit and CM1-0 bits.
PSEL pin
(SW3_4)
PSEL bit
CM1 pin
(SW3_1)
CM1 bit
CM0 pin
(JP18)
CM0 bit
(UNLOCK)
PLL
X'tal
Clock source
SDTO
source
000
-
ON ON(Note) PLL(RX)
RX
001
- OFF ON
X'tal DAUX
010
0
ON ON
PLL(RX)
RX
1 ON ON
X'tal DAUX
011
- ON ON
X'tal DAUX
100
- ON ON(Note) PLL(ELRCK) DAUX
101
- OFF ON
X'tal DAUX
110
0 ON ON PLL(ELRCK) DAUX
1 ON ON
X'tal DAUX
ON: Oscillation (Power-up), OFF: STOP (Power-Down)
Note: When the X’tal is not used as clock comparison for fs detection (XTL0, 1= “1,1”), the X’tal is OFF.
Table 8. Clock Operation Mode Select
Default
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ASAHI KASEI
[AKD4115-A]
Toggle switch set-up
SW2 PDN
Reset switch for AK4115. Set to “H” during normal operation. Bring to “L” once after the
power is supplied.
LED indication
LE1 INT0
LE2 INT1
Bright when INT0 pin goes to “H”.
Bright when INT1 pin goes to “H”.
DIP switch (SW1) set-up: -off- means “L”
No. Switch Name
Function
1 IPS0
Set-up of IPS0 pin. (in parallel mode)
2 DIF0
Set-up of DIF0 pin. (in parallel mode)
3 DIF1
Set-up of DIF1 pin. (in parallel mode)
4 XSEL
Set-up of XSEL pin. (in parallel mode) “L”: X’tal 1, “H”: X’tal 2
5 IPS1/IIC
Set-up of IPS1 pin. (in parallel mode)
Set-up of IIC pin. (in serial mode) “L”: 4 wire Serial, “H”: IIC
6 P/SN
Set-up of P/SN pin. “L”: Serial mode, “H”: parallel mode
7 TEST
Set-up of TEST pin. (always “OFF”)
8 ACKS
Set-up of ACKS pin. (in parallel mode)
“L”: Manual Setting, “H”: Auto Setting
DIP switch (SW3) set-up: -off- means “L”
No. Switch Name
Function
Table 23
1 CM1
Set-up of CM1 pin. (in parallel mode)
2 OCKS1
Set-up of OCKS1 pin. (in parallel mode)
3 OCKS0
Set-up of OCKS0 pin. (in parallel mode)
4 PSEL
Set-up of PSEL pin. (in parallel mode)
”L”: S/PDIF Input, “H”: ELRCK Input Clock
5 XTL0
Set-up of XTL0 pin.
6 XTL1
Set-up of XTL1 pin.
7 DIR_I/O
Set-up of the transmission direction of 74AC245
“L”: When inputting from PORT2, “H”: When outputting from PORT2
8 DIT_I/O
Set-up of the transmission direction of 74AC245
“L”: When inputting from PORT5, “H”: When outputting from PORT5.
Set-up of XSEL, XTL1 and XTL0
Table 24
SW1_4
Status
XSEL
X’tal #1
X’tal #2
0
Power-Up
Power-Down
1
Power-Down
Power-Up
Table 25. Setting of X’tal oscillator
SW3_6
XTL1
0
0
1
1
SW3_5
XTL0
0
1
0
1
X’tal Frequency
X’tal #1
X’tal #2
11.2896MHz
12.288MHz
12.288MHz
11.2896MHz
24.576MHz
22.5792MHz
(Use channel status)
Table 26. Reference X’tal frequency
Default
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Default
OFF
OFF
OFF
OFF
OFF
OFF
ON
OFF
Default
<KM076403>
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