|
|
PDF SI9750 Data sheet ( Hoja de datos )
| Número de pieza | SI9750 | |
| Descripción | In-Rush Current Limit MOSFET Driver | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SI9750 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
Si9750
Vishay Siliconix
In-Rush Current Limit MOSFET Driver
FEATURES
D 2.9- to 13-V Input Operating Range
D Microprocessor RESET
D Integrated High-Side Driver for N-Channel MOSFET
D Programmable di/dt Current
DESCRIPTION
The Si9750 current limit MOSFET interface IC is designed to
operate between a power source and a load using a low
on-resistance power MOSFET with a sense terminal or in
conjunction with a low ohmic sense resistor. The Si9750
current limiter prevents source and load transients during hot
swap and power-on with programmable dv/dt and di/dt. Both
turn-on and steady-state current limits can be individually
programmed, providing protection against short circuits.
Power on RESET and logic controls allow complete
microprocessor interfacing. The RESET function of the
Si9750 is industry-standard with full programmability.
The Si9750 is available in a 16-pin SOIC package and is rated
over the commercial temperature range (0 to 70_C).
The Si9750 is available in both standard and lead (Pb)-free
packages.
www.DataSheet4U.com
FUNCTIONAL BLOCK DIAGRAM
VDD
RBIAS
HI/LO
ENABLE
STATUS
CRETRY
CRST
GND
Bias
Control
Boost
Ref
POR
Gate
Drive
Retry
Delay
Overcurrent
IBIAS
+
−
POR
POR
Reset
Delay
Bandgap
Ref
Reset
−
+
Ref
COIL
BOOST
GATE
CBOOST
LBOOST
CGATE
SENSE
LIMSET
LOAD
RLIMSET
VRST
RESET
VDD
Low RDS
N-Channel FET
RSENSE
(mW)
VLOAD
Load
Document Number: 70028
S-40754—Rev. D, 19-Apr-04
www.vishay.com
1
1 page  
Si9750
Vishay Siliconix
FUNCTIONAL DESCRIPTION (CONT’D)
di/dt Limiting On Hot and Cold Insertion (GATE pin)
The GATE pin provides a constant current source that is used
to control the rate of rise of the gate of the MOSFET, and hence
to control the di/dt of the load and source current. The equation
that governs the gate current is:
ISOURCE +
1.25 V x
12
R BIAS
+
1.2 mA
(for RBIAS = 12.5 kW)
(4)
Typically, a 33-nF capacitor should be connected from the
GATE pin to ground. If a large ISOURCE is needed for high di/dt,
a 330-W resistor in series with CGATE may be necessary to
prevent oscillation. In the case that VDD > 6 V, a resistor of
approximately 330 W is also recommended in series with the
gate. (Figure 1)
Reference Bias Current
(RBIAS pin)
This pin sets the internal current used by RLIMSET to determine
all the current limit points. Typically RBIAS = 12.5 kW which sets
a 20-mA bias current. The equation which relates RBIAS to IBIAS
is:
boost inductor should typically be 100 mH, <3.5 W, >180 mA
dc, and the boost capacitor should be 100 nF.
Logic Control
(STATUS, ENABLE, RESET, VRST and CRST pins)
STATUS. The status monitor detects when the load voltage is
90% of input voltage, VLOAD > 0.9 x VDD. This pin is an
open-drain NMOS output, capable of sinking 200 mA at VOL =
0.4 V. If this pin is used in conjunction with the ENABLE of
another unit, power supply sequencing (or daisy-chaining) is
easily implemented.
ENABLE. This CMOS logic compatible input serves as the
on/off control pin. This pin has 40-mA minimum pull-up to VDD.
RESET (VRST, CRST, RESET pins). This is a standard
implementation of the microprocessor reset function. A
comparator looks at the voltage on VRST pin and compares it
with 1.25 V. This function is programmable by using an
external voltage divider. When VRST is higher than 1.25 V, the
reset signal is delayed by the CRST pin, defined by Equation (6)
and then goes high. (Figure 2)
IBIAS +
1.25 V
5 x RBIAS
+
20 mA
(for RBIAS = 12.5 kW)
Reset delay tRSTD [ 104 x CRST
(5)
(6)
Power on Reset (POR)
(VDD pin)
This function monitors the voltage on the VDD pin and signals
the system if all input voltage requirements have been met. At
turn-on when VDD > 2.7 V " 200 mV, a POR signal is
generated for a duration of 100 ms. After this point the system
is released into operation. If VDD falls below 2.7 V " 200 mV,
a second POR signal will be generated. If two POR signals are
detected, this indicates that the source for VDD is not capable
of supplying the load current. The IC then turns off the
MOSFET and initiates its retry period, hence fully protecting
the MOSFET from an over-power condition.
Boost Converter
(COIL, BOOST pins)
The boost converter generates the gate drive for the external
n-channel MOSFET. This is limited to typically VDD + 11 V. The
Document Number: 70028
S-40754—Rev. D, 19-Apr-04
Current
HI/LO Pin
RLIMSET
CRETRY
Turn-On
Short Circuit
Applied to Output
VGATE > VDD + 7.8 V
Current Limit Point
ILOAD
FIGURE 2. Typical Operation Under Start-up Condition With
An Overcurrent Fault Applied to the Output
www.vishay.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet SI9750.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SI9750 | In-Rush Current Limit MOSFET Driver | Vishay Siliconix |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |