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PDF 56855 Data sheet ( Hoja de datos )
| Número de pieza | 56855 | |
| Descripción | 16-bit Digital Signal Controllers | |
| Fabricantes | Freescale Semiconductor | |
| Logotipo |  |
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56855
Data Sheet
Technical Data
56800E
16-bit Digital Signal Controllers
www.DataSheet4U.com
DSP56855
Rev. 6
01/2007
freescale.com
1 page  
56855 Description
• Six (6) independent channels of DMA
• Time-of-Day (TOD)
• Up to 18 GPIO
* Each peripheral I/O can be used alternately as a General Purpose I/O if not needed
1.1.4 Energy Information
• Fabricated in high-density CMOS with 3.3V, TTL-compatible digital inputs
• Wait and Stop modes available
1.2 56855 Description
The 56855 is a member of the 56800E core-based family of controllers. It combines, on a single chip, the
processing power of a Digital Signal Processor (DSP) and the functionality of a microcontroller with a
flexible set of peripherals, creating an extremely cost-effective solution. Because of its low cost,
configuration flexibility, and compact program code, the 56855 is well-suited for many applications. The
56855 includes many peripherals that are especially useful for low-end Internet appliance applications
and low-end client applications such as telephony; portable devices; Internet audio; and point-of-sale
systems, such as noise suppression; ID tag readers; sonic/subsonic detectors; security access devices;
remote metering; sonic alarms.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming
model and optimized instruction set allow straightforward generation of efficient, compact code for both
DSP and MCU applications. The instruction set is also highly efficient for C Compilers, enabling rapid
development of optimized control applications.
The 56855 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip Data RAM per instruction cycle. The 56855 also provides two external
dedicated interrupt lines, and up to 18 General Purpose Input/Output (GPIO) lines, depending on
peripheral configuration.
The 56855 controller includes 24K words of Program RAM, 24K words of Data RAM and 1K of Boot
ROM. It also supports program execution from external memory.
This controller also provides a full set of standard programmable peripherals that include one Enhanced
Synchronous Serial Interface (ESSI), two Serial Communications Interfaces (SCI), and one Quad Timer.
The ESSI, SCIs, four chip selects and Quad Timer external output can be used as General Purpose
Input/Outputs when its primary function is not required.
Freescale Semiconductor
56855 Technical Data, Rev. 6
5
5 Page 
Introduction
Table 3-1. 56855 Signal and Package Information for the 100-pin LQFP (Continued)
Pin No. Signal Name
Type
Description
1 VDDIO
14 VDDIO
29 VDDIO
43 VDDIO
49 VDDIO
58 VDDIO
72 VDDIO
76 VDDIO
86 VDDIO
96 VDDIO
2 VSSIO
15 VSSIO
30 VSSIO
44 VSSIO
50 VSSIO
60 VSSIO
73 VSSIO
78 VSSIO
87 VSSIO
97 VSSIO
2 VSSIO
18 VDDA
19 VSSA
VDDIO
Power (VDDIO)—These pins provide power for all I/O and ESD structures of
the chip, and should all be attached to VDDIO (3.3V).
VSSIO
Ground (VSSIO)—These pins provide grounding for all I/O and ESD
structures of the chip and should all be attached to VSS.
VDDA
VSSA
Analog Power (VDDA)—These pins supply an analog power source.
Analog Ground (VSSA)—This pin supplies an analog ground.
Freescale Semiconductor
56855 Technical Data, Rev. 6
11
11 Page | ||
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