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PDF ADG1404 Data sheet ( Hoja de datos )
| Número de pieza | ADG1404 | |
| Descripción | Multiplexer | |
| Fabricantes | Analog Devices | |
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Data Sheet
1.5 Ω On Resistance,
±15 V/12 V/±5 V, 4:1, iCMOS Multiplexer
ADG1404
FEATURES
1.5 Ω on resistance
0.3 Ω on-resistance flatness
0.1 Ω on-resistance match between channels
Up to 400 mA continuous current
Fully specified at +12 V, ±15 V, and ±5 V
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
14-lead TSSOP and 4 mm × 4 mm, 16-lead LFCSP
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Communication systems
Relay replacement
GENERAL DESCRIPTION
The ADG1404 is a complementary metal-oxide semiconductor
(CMOS) analog multiplexer, comprising four single channels
designed on an iCMOS® process. iCMOS (industrial CMOS) is
a modular manufacturing process that combines high voltage
CMOS and bipolar technologies. It enables the development of
a wide range of high performance analog ICs capable of 33 V
operation in a footprint that no previous generation of high
voltage devices achieve. Unlike analog ICs using conventional
CMOS processes, iCMOS components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The on-resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals.
iCMOS construction ensures ultralow power dissipation,
making the device ideally suited for portable and battery-
powered instruments.
FUNCTIONAL BLOCK DIAGRAM
ADG1404
S1
S2
D
S3
S4
1 OF 4
DECODER
A0 A1 EN
Figure 1.
The ADG1404 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. Logic 0 on the EN pin disables the device. Each switch
conducts equally well in both directions when on and has an
input signal range that extends to the supplies. In the off condi-
tion, signal levels up to the supplies are blocked. All switches
exhibit break-before-make switching action. Inherent in the
design is low charge injection for minimum transients when
switching the digital inputs.
PRODUCT HIGHLIGHTS
1. 2.6 Ω maximum on resistance over temperature.
2. Minimum distortion.
3. Ultralow power dissipation: <0.03 μW.
4. 14-lead TSSOP and 16-lead, 4 mm × 4 mm LFCSP package.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADG1404
Data Sheet
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On-Resistance Match
Between Channels (ΔRON)
On-Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Drain Off Leakage, ID (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tBBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
CS (Off)
CD (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
IDD
VDD
25°C −40°C to +85°C
2.8
3.5 4.3
0.13
0.21 0.23
0.6
1.1 1.2
±0.02
±0.55
±0.03
±0.55
±0.1
±1.5
±2
±4
±4
0.001
3.5
230
300 375
180
240 295
115
160 190
100
30
80
82
35
−0.3
39
150
217
0.001
170
−40°C to +125°C
0 V to VDD
4.8
0.25
1.3
±12.5
±30
±30
2.0
0.8
±0.1
430
335
220
10
1
285
5/16.5
1 Guaranteed by design, not subject to production test.
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
V min/max
Test Conditions/Comments
VS = 0 V to 10 V, IS = −10 mA; see Figure 22
VDD = 10.8 V, VSS = 0 V
VS = 0 V to 10 V, IS = −10 mA
VS = 0V to 10 V, IS = −10 mA
VDD = 13.2 V, VSS = 0 V
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23
VS = 1 V/10 V, VD = 10 V/1 V; see Figure 23
VS = VD = 1 V or 10 V; see Figure 24
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 29
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 8 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V; see Figure 30
VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 32
RL = 50 Ω, CL = 5 pF, f = 100kHz; see Figure 25
RL = 50 Ω, CL = 5 pF, f = 100kHz; see Figure 27
RL = 50 Ω, CL = 5 pF; see Figure 26
RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 26
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
f = 1 MHz, VS = 6 V
VDD = 13.2 V
Digital inputs = 0 V or VDD
Digital inputs = 5 V
GND = 0 V, VSS = 0 V
Rev. B | Page 4 of 16
5 Page 
ADG1404
6
4
2
0
–2
IS (OFF) + –
ID (OFF) + –
–4
IS (OFF) – +
ID (OFF) – +
–6 ID, IS (ON) + +
ID, IS (ON) – –
–8
–10
–12
VDD = +15V
VSS = –15V
–14 VBIAS = +10V/–10V
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 10. Leakage Currents as a Function of Temperature,15 V Dual Supply
4
IS (OFF) + –
3
ID (OFF) + –
IS (OFF) – +
ID (OFF) – +
2 ID, IS (ON) + +
ID, IS (ON) – –
1
0
–1
–2
–3 VDD = +5V
VSS = –5V
–4 VBIAS = +4.5V/–4.5V
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 11. Leakage Currents as a Function of Temperature, 5 V Dual Supply
14
IS (OFF) + –
12 ID (OFF) + –
IS (OFF) – +
10 ID (OFF) – +
ID, IS (ON) + +
8 ID, IS (ON) – –
6
4
2
0
–2
VDD = 12V
VSS = 0V
–4 VBIAS = 1V/10V
0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 12. Leakage Currents as a Function of Temperature, 12 V Single Supply
Data Sheet
80
TA = 25°C
IDD PER LOGIC INPUT
70
60
50
40
30 VDD = +12V
VSS = 0V
20
VDD = +15V
VSS = –15V
10 VDD = +5V
VSS = –5V
0
0 2 4 6 8 10 12 14
LOGIC, Ax (V)
Figure 13. IDD vs. Logic Level
600
TA = 25°C
400
200
0
–200
VDD = +15V, VSS = –15V
VDD = +5V, VSS = –5V
VDD = +12V, VSS = 0V
–400
–600
–15
–10
–5 0
VS (V)
5
10
Figure 14. Charge Injection vs. Source Voltage
15
500
450
VDD = +5V, VSS = –5V
400
350
300
VDD = +12V, VSS = 0V
250
200
150
VDD = +15V, VSS = –15V
100
50
0
–40 –20
0
20 40 60 80 100
TEMPERATURE (°C)
Figure 15. Transition Times vs. Temperature
120
Rev. B | Page 10 of 16
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADG1404.PDF ] | |
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