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PDF MMA1260EG Data sheet ( Hoja de datos )

Número de pieza MMA1260EG
Descripción Low G Micromachined Accelerometer
Fabricantes Freescale Semiconductor 
Logotipo Freescale Semiconductor Logotipo



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No Preview Available ! MMA1260EG Hoja de datos, Descripción, Manual

Freescale Semiconductor
Technical Data
Low G
Micromachined Accelerometer
The MMA series of silicon capacitive, micromachined accelerometers feature
signal conditioning, a 2-pole low pass filter and temperature compensation.
Zero-g offset full scale span and filter cut-off are factory set and require no
external devices. A full system self-test capability verifies system functionality.
Features
• Integral Signal Conditioning
• Linear Output
• 2nd Order Bessel Filter
• Calibrated Self-test
• EPROM Parity Check Status
• Transducer Hermetically Sealed at Wafer Level for Superior Reliability
• Robust Design, High Shock Survivability
Typical Applications
• Vibration Monitoring and Recording
• Appliance Control
• Mechanical Bearing Monitoring
• Computer Hard Drive Protection
• Computer Mouse and Joysticks
• Virtual Reality Input Devices
• Sports Diagnostic Devices and Systems
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ORDERING INFORMATION
Device Name
Temperature Range Case No.
MMA1260EG
40° to 105°C
475-01
MMA1260EGR2
40° to 105°C
475-01
Package
SOIC-16
SOIC-16
Tape & Reel
Document Number: MMA1260EG
Rev 0, 04/2007
MMA1260EG
MMA1260EG: Z AXIS SENSITIVITY
MICROMACHINED
ACCELEROMETER
±1.5g
EG SUFFIX (Pb-FREE)
16-LEAD SOIC
CASE 475-01
G-Cell
Sensor
Integrator
Temp Comp
Gain Filter
and Gain
VDD
VOUT
ST
Self-test
Control Logic &
EPROM Trim Circuits
Oscillator
Clock
Generator
VSS
STATUS
Figure 1. Simplified Accelerometer Functional Block Diagram
VSS
VSS
VSS
VOUT
STATUS
VDD
VSS
ST
1
2
3
4
5
6
7
8
16 N/C
15 N/C
14 N/C
13 N/C
12 N/C
11 N/C
10 N/C
9 N/C
Figure 2. Pin Connections
© Freescale Semiconductor, Inc., 2007. All rights reserved.

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MMA1260EG pdf
Pinout Description
BASIC CONNECTIONS
PCB Layout
VSS
VSS
VSS
VOUT
STATUS
VDD
VSS
ST
1
2
3
4
5
6
7
8
16 N/C
15 N/C
14 N/C
13 N/C
12 N/C
11 N/C
10 N/C
9 N/C
STATUS
P1
ST P0
VOUT
R
A/D In
VSS 1 kC 0.1 µF
VDD C 0.1 µF
VRH
C 0.1 µF
VSS
C 0.1 µF
VDD
Table 3. Pin Descriptions
Pin No. Pin Name
Description
1 thru 3
4
5
VSS
VOUT
STATUS
Redundant connections to the internal
VSS and may be left unconnected.
Output voltage of the accelerometer.
Logic output pin to indicate fault.
6 VDD The power supply input.
7 VSS The power supply ground.
8 ST Logic input pin used to initiate self-test.
9 thru 13 Trim pins Used for factory trim. Leave
unconnected.
14 thru 16
— No internal connection. Leave
unconnected.
VDD
Logic
Input
C1
0.1 µF
MMA1260EG 5
8 ST
R1
6 VDD
VOUT 4 1 k
1
2
3
VVVSSSSSS
7 VSS
C2
0.1 µF
STATUS
Output
Signal
Power Supply
Figure 6. Recommended PCB Layout for Interfacing
Accelerometer to Microcontroller
NOTES:
1. Use a 0.1 µF capacitor on VDD to decouple the power
source.
2. Physical coupling distance of the accelerometer to the
microcontroller should be minimal.
3. Place a ground plane beneath the accelerometer to
reduce noise, the ground plane should be attached to
all of the open ended terminals shown in Figure 6.
4. Use an RC filter of 1 kand 0.1 µF on the output of the
accelerometer to minimize clock noise (from the
switched capacitor filter circuit).
5. PCB layout of power and ground should not couple
power supply noise.
6. Accelerometer and microcontroller should not be a
high current path.
7. A/D sampling rate and any external power supply
switching frequency should be selected such that they
do not interfere with the internal accelerometer
sampling frequency. This will prevent aliasing errors.
Figure 5. SOIC Accelerometer with Recommended
Connection Diagram
Sensors
Freescale Semiconductor
MMA1260EG
5

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