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PDF ATA8201 Data sheet ( Hoja de datos )

Número de pieza ATA8201
Descripción UHF ASK/FSK Receiver
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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ATA8201/ATA8202
UHF ASK/FSK Receiver
DATASHEET
Features
Transparent RF receiver ICs for 315MHz (Atmel® ATA8201) and 433.92MHz
(Atmel ATA8202) with high receiving sensitivity
Fully integrated PLL with low phase noise VCO, PLL, and loop filter
High FSK/ASK sensitivity:
–105dBm (Atmel ATA8201, FSK, 9.6Kbits/s, Manchester, BER 10-3
–114dBm (Atmel ATA8201, ASK, 2.4Kbits/s, Manchester, BER 10-3)
–104dBm (Atmel ATA8202, FSK, 9.6Kbits/s, Manchester, BER 10-3)
–113dBm (Atmel ATA8202, ASK, 2.4Kbits/s, Manchester, BER 10-3)
Supply current: 6.5mA in Active Mode (3V, 25°C, ASK Mode)
Data rate: 1Kbit/s to 10Kbits/s Manchester ASK, 1Kbit/s to 20Kbits/s Manchester
FSK with four programmable bit rate ranges
Switching between modulation types ASK/FSK and different data rates possible in
1ms typically, without hardware modification on board to allow different
modulation schemes
Low standby current: 50µA at 3V, 25°C
ASK/FSK receiver uses a low-IF architecture with high selectivity, blocking, and low
intermodulation (typical 3-dB blocking 68.0dBC at ±3MHz/74.0dBC at ±20.0MHz,
system I1dBCP = –31dBm/system IIP3 = –24dBm)
Telegram pause up to 52ms supported in ASK Mode
Wide bandwidth AGC to handle large out-of-band blockers above the system
I1dBCP
440-kHz IF frequency with 30-dB image rejection and 420-kHz IF bandwidth to
support PLL transmitters with standard crystals or SAW-based transmitters
RSSI (received signal strength indicator) with output signal dynamic range of 65dB
Low in-band sensitivity change of typically ±2.0dB within ±160-kHz center
frequency change in the complete temperature and supply voltage range
Sophisticated threshold control and quasi-peak detector circuit in the data slicer
Fast and stable XTO start-up circuit (> –1.4 kΩ worst-case start impedance)
Clock generation for microcontroller
ESD protection at all pins (±4kV HBM, ±200V MM, ±500V FCDM)
4971G-INDCO-09/14

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ATA8201 pdf
Figure 1-3. Block Diagram
CDEM
SENSE
SENSE_CTRL
GND
DVCC
LNA_IN
LNA_GND
ASK/FSK
Demo-
dulator
ASK
FSK
Power
Supply
VS3V_AVCC
VS5V
IF Amp
ASK/FSK
Control
ASK_NFSK
IF Filter
LPF
Data
Slicer
Standby
Logic Control
DATA_OUT
BR0
BR1
RX
IF Amp
LPF
LNA
XTO
Div. by 3, 6, 12
PLL
(/24, /32)
XTO
VCO
XTAL2 XTAL1
CLK_OUT_CTRL1
CLK_OUT_CTRL0
CLK_OUT
RSSI
ENABLE
TEST1
TEST2
TEST3
ATA8201/ATA8202 [DATASHEET]
4971G–INDCO–09/14
5

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ATA8201 arduino
Figure 2-7. Narrow-band 3-dB Blocking Characteristic at 315MHz
80
70
60
50
40
30
20
10
0
-10
-5
-4 -3 -2 -1 0 1 2 3 4
Distance from Interfering to Receiving Signal (MHz)
5
Figure 2-8. Wide-band 3-dB Blocking Characteristic at 315MHz
80
70
60
50
40
30
20
10
0
-10
-50
-40 -30 -20 -10
0
10 20 30 40
Distance from Interfering to Receiving Signal (MHz)
50
Table 2-8 shows the blocking performance measured relative to –102dBm for some frequencies. Note that sometimes the
blocking is measured relative to the sensitivity level 104dBm (denoted dBS), instead of the carrier –102dBm (denoted dBC).
Table 2-8. Blocking 3dB Above Sensitivity Level With BER < 10–3
Frequency Offset
+1.5MHz
–1.5MHz
+2MHz
–2MHz
+3MHz
–3MHz
+20MHz
–20MHz
Blocking Level
–44.5dBm
–44.5dBm
–39.0dBm
–36.0dBm
–34.5dBm
–34.5dBm
–28.0dBm
–28.0dBm
Blocking
57.5dBC, 60.5dBS
57.5dBC, 60.5dBS
63dBC, 66dBS
66dBC, 69dBS
67.5dBC, 70.5dBS
67.5dBC, 70.5dBS
74dBC, 77dBS
74dBC, 77dBS
The Atmel® ATA8201/ATA8202 can also receive FSK and ASK modulated signals if they are much higher than the I1dBCP.
It can typically receive useful signals at –10dBm. This is often referred to as the nonlinear dynamic range (that is, the
maximum to minimum receiving signal), and is 95dB for 10Kbits/s Manchester (FSK). This value is useful if the transmitter
and receiver are very close to each other.
ATA8201/ATA8202 [DATASHEET]
4971G–INDCO–09/14
11

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