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PDF ISL6592 Data sheet ( Hoja de datos )
| Número de pieza | ISL6592 | |
| Descripción | 6-Phase Digital Multiphase Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
August 5, 2005
ISL6592
FN9163.1
6-Phase Digital Multiphase Controller
The ISL6592 digital multiphase controller provides core
power for today's high current microprocessors by driving up
to six synchronous-rectified buck-converter channels in
parallel. Interleaved timing of the channels results in a higher
ripple frequency, reducing input and output ripple. With up to
six phases, each capable of up to 1.5MHz operation, the
ISL6592 can be used to build DC/DC converters that provide
up to 200A with excellent efficiency, low ripple, and the
lowest component count.
The ISL6592 utilizes digital technology to implement all
control functions, providing the ultimate in flexibility and
stability. The ISL6592 incorporates an industry standard I2C
serial interface for control and monitoring. Through the serial
interface, the power supply designer can quickly optimize
designs and monitor parameters. The interface allows the
ISL6592 to provide digitized information for real time system
monitoring and control.
The ISL6592 provides superior loadline accuracy through
internal calibration that measures and corrects current sense
error sources upon start-up. The ISL6592 has
programmable current sense temperature compensation
that allows the designer to tailor the response for best
loadline accuracy over temperature. Superior loadline
accuracy reduces component count and solution cost.
To further reduce component count the ISL6592
incorporates patented Active Transient Response (ATR)
technology, allowing the fastest response to transient events
for reduced output capacitance.
The flexibility of the ISL6592 allows the power supply
designer to implement a wide range of solutions. When used
with industry standard power train components, ISL6592
provides the highest performance with lowest component
count and cost. When area is at a premium, ISL6592 can be
used with the ISL6597 integrated power stage to implement
the industry's highest density power solutions.
Ordering Information
TEMP.
PART NUMBER RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL6592DNZ-T
(Note)
0 to 85
48 Ld 7x7 LQFP
(Pb-free)
Q48.7x7A
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Multiphase power conversion
- 2- to 6-phase operation
• 300kHz to 1.5MHz switching frequency
• Supports Intel® VR 10.x, AMD®, and custom VID codes
• Internal high precision voltage reference
- ±5mV voltage setpoint accuracy
• Precision digital current sense calibration
- ±14mV loadline accuracy
• Precise digital current balancing with programmable
offsets for thermal balancing
• Digitally programmable loadline and loop compensation
• Differential voltage sense
• Digital temperature sensor compensation
• Active Transient Response (ATR) enables meeting
transient requirements with reduced output capacitance
• I2C interface for monitoring, control and configuration
• Internal non-volatile memory (NVM) to store custom
configurations with four programmable system
configurations
• Extensive fault detection capability with two user
configurable output fault pins
- Input Undervoltage
- Output Under/Overvoltage
- High Side Short
- Per Phase and Total Output Current
- Multiple Internal and External Temperature Limits
- -NVM Configuration
- Calibration Range and Time-Out
• Configurable latched fault or autonomous recovery
shutdown
• Single +3.3V supply operation
• 48 lead LQFP plastic package
• Commercial temperature range of 0°C to 85°C ambient
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core power regulation for Intel® and AMD® mprocessors
• Intelligent point-of-load (POL) power regulation
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6592
DAbsolute Maximum Ratings
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . -0.50V to 4.25V
All pins except ISENx and ground . . . . . . . . . . . . . . -0.50V to 4.25V
All ISENx pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.50V to 3.0V
All ground pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.50V to 0.50V
Differential Voltage (VSEN_DIFF) . . . . . . . . . . . . . . . . . . . . . . . . 2.5V
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7)
(100pF, 1.5kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3,000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . 1,000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
48
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Junction Temperature Range . . . . . . . . . . . 0°C to 125°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . +3.0V to +3.6V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications VDD = +3.3V, TC = +85°C, unless otherwise specified
PARAMETER
SYMBOL
TEST CONDITIONS
VDD SUPPLY
Nominal supply current
VID[5:0] INPUTS (Note 4)
IVDD
VDD = +3.3V, ISEN[6:1] = -70µA
Input low voltage
Input high voltage
Input current (input voltage low)
Input current (input voltage high)
OUTEN INPUT
VIL_VID
VIH_VID
IIL_VID
IIH_VID
(Note 5)
VIN = 0.0V
VIN = 3.5V
Input low voltage
Input high voltage
Input current (input voltage low)
Input current (input voltage high)
LL[1:0] INPUTS
VIL_OE
VIH_OE
IIL_OE
IIH_OE
OE = 0.0V
OE = 3.5V
Input low voltage
Input high voltage
Input current (input voltage low)
Input current (input voltage high)
SDA, SCL INPUTS
VIL_LL
VIH_LL
IIL_LL
IIH_LL
LL(X) = 0.0V
LL(X) = 1.20V
Input low voltage
Input high voltage
Input current, input voltage low
Input current, input voltage high
Output low voltage
VIL_S
VIH_S
IIL_S
IIH_S
VOL
VIN = 0.0V
VIN = 3.5V
Open drain output, ILOAD = +5mA
MIN TYP MAX UNITS
100 140 mA
-0.3 0.4 V
0.8 5.5 V
-75 10 µA
-10 10 µA
-0.3 0.4 V
0.8 5.5 V
-75 10 µA
-10 10 µA
0.4 V
0.8 V
-20 -30 µA
15 25 µA
-0.3 0.8 V
2.4 5.5 V
-10 10 µA
-10 10 µA
0.4 V
5 FN9163.1
August 5, 2005
5 Page 
ISL6592
over the serial bus to identify the specific fault event. Fault
detection includes the following:
• Input Undervoltage
• Output Overvoltage
• Output Undervoltage
• High-side Short
• Per Phase Overcurrent
• Total Output Overcurrent
• Two levels of Internal Temperature Protection
• Two levels of External Temperature Protection
• Configuration Failure
• Calibration Range Failure
• Calibration Time-out Failure
The ISL6592 is also optimized for use with the ISL6597
integrated power stage to deliver a high performance VR
solution. The ISL6597 offers the following benefits when
combined with the ISL6592 controller:
• Low delay, fast transition, low rDS(ON) (13mΩ) integrated
high side P-channel FET
• Low delay, high drive (2A) low side N-channel FET driver
• High accuracy, low drift integrated current mirror, allowing
lossless current sensing with loadline accuracy
comparable to series sense resistor solutions
• Power supply sequence independence between the
power input (12V), low side driver supply (5-12V), and
controller supply (3.3V)
• Direct high side short detect and crowbar capability,
operates off the 12V input supply and is thus independent
of controller power supply
Please see the ISL6597 data sheet for more details on the
performance, capability, and interface requirements of
ISL6592/ISL6597 systems.
Theory of Operation
Power Up and Initialization
The ISL6592 is designed to provide supply sequence
independence and graceful turn-on and turn-off operation. It
operates from a single +3.3V supply, while an on-chip low
drop-out (LDO) regulator generates an internal +2.5V
supply. Power-up controller configuration is initialized by
either an internal threshold based power-on reset, or by an
external reset pin (RST_N). During controller configuration,
the contents of the NVM are read into the controller's
registers. During configuration, all outputs are three-stated,
allowing board pull-up or pull-down resistors to set the
correct default level.
Once configuration is completed, the controller enters an
inactive state. Outputs assume their default values, which
may be low, high or three-state. During the inactive state, the
controller can communicate over the serial bus, report
configuration or inactive state faults (e.g. high side short).
The controller will leave the inactive state and begin soft-
start once it has a valid VID, OEN is asserted, and the 12V
power input is valid. The 12V input is sensed through a
resistive divider on the board, and a programmable
threshold comparator must be tripped if the input
undervoltage lockout is enabled. The sense circuit can be
easily modified to also sense an independent or sequenced
lower drive voltage typically used to optimize the efficiency of
the power stage low side FET.
Soft-Start and Calibration
Prior to entering an active regulating state, the ISL6592
performs a well-controlled, monotonic initial ramp or "soft-
start". Soft-start is performed by actively regulating the load
voltage while digitally ramping the target voltage from 0 to
the voltage set. During this time, the optional power-up
system calibration can be performed. The calibration
algorithm compensates for variations in low-side FET
rDS(ON), parasitic inductance and resistance by regulating to
a low voltage level, putting a known current load through
each phase individually and compensating for the current
sense gain and offset error, as well as changes in
temperature. Alternatively, default compensation values can
be used, or the compensation values can be computed
during system test and stored in memory. The external
current load needed to perform calibration can be
implemented with a precision resistor and N-channel FET.
The voltage across the resistor is sensed and the N-channel
FET gate voltage is adjusted through an internal opamp loop
to provide the desired precision current. The calibration
current level and the voltage level at which the calibration is
performed are both programmable.
After the soft-start ramp is completed, the processor's
leakage current is measured. At this point the regulator
enters the active regulation state and the VCC_PWRGD pin
transitions from "0" to "1," indicating that the microprocessor
voltage is within 90% of the target value.
11 FN9163.1
August 5, 2005
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ISL6592.PDF ] | |
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