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PDF ISL6313 Data sheet ( Hoja de datos )
| Número de pieza | ISL6313 | |
| Descripción | Two-Phase Buck PWM Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
March 5, 2007
ISL6313
FN6448.0
Two-Phase Buck PWM Controller with
Integrated MOSFET Drivers for Intel VR11
and AMD Applications
The ISL6313 two-phase PWM control IC provides a
precision voltage regulation system for advanced
microprocessors. The integration of power MOSFET drivers
into the controller IC marks a departure from the separate
PWM controller and driver configuration of previous multi-
phase product families. By reducing the number of external
parts, this integration is optimized for a cost and space
saving power management solution.
One outstanding feature of this controller IC is its
multiprocessor compatibility, allowing it to work with both Intel
and AMD microprocessors. Included are programmable VID
codes for Intel VR11 as well as AMD 5-bit and 6-bit DAC tables.
A circuit is provided for remote voltage sensing, compensating
for any potential difference between remote and local grounds.
The output voltage can also be positively or negatively offset
through the use of a single external resistor.
The ISL6313 also includes advanced control loop features
for optimal transient response to load apply and removal.
One of these features is highly accurate, fully differential,
continuous DCR current sensing for load line programming
and channel current balance. Active Pulse Positioning (APP)
Modulation and Adaptive Phase Alignment (APA) are two
other unique features, allowing for quicker initial response to
high di/dt load transients. With this quicker initial response to
load transients, the number of output bulk capacitors can be
reduced, helping to reduce cost.
Integrated into the ISL6313 are user programmable current
sense resistors, which require only a single external resistor
to set their values. No external current sense resistors are
required. Another unique feature of the ISL6313 is the
addition of a dynamic VID compensation pin that allows
optimizing compensation to be added for well controlled
dynamic VID response.
Protection features of this controller IC include a set of
sophisticated overvoltage, undervoltage, and overcurrent
protection. Furthermore, the ISL6313 includes protection
against an open circuit on the remote sensing inputs.
Combined, these features provide advanced protection for the
microprocessor and power system.
Features
• Integrated Multi-Phase Power Conversion
- 2-Phase or 1-Phase Operation with Internal Drivers
• Precision Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Temperature
- Adjustable Reference-Voltage Offset
• Optimal Transient Response
- Active Pulse Positioning (APP) Modulation
- Adaptive Phase Alignment (APA)
• Fully Differential, Continuous DCR Current Sensing
- Integrated Programmable Current Sense Resistors
- Accurate Load Line Programming
- Precision Channel Current Balancing
• Variable Gate Drive Bias: 5V to 12V
• Multi-Processor Compatible
- Intel VR11 Mode of Operation
- AMD Mode of Operation
• Microprocessor Voltage Identification Inputs
- 8-Bit DAC
- Selectable between Intel VR11, AMD 5-bit, and AMD
6-bit DAC tables
- Dynamic VID Technology
• Dynamic VID Compensation
• Overcurrent Protection
• Multi-tiered Overvoltage Protection
• Digital Soft-Start
• Selectable Operation Frequency up to 1.5MHz Per Phase
• Pb-free Available (RoHS Compliant)
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
TEMP.
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6313CRZ* ISL6313 CRZ 0 to +70 36 Ld 6x6 QFN L36.6x6
ISL6313IRZ* ISL6313 IRZ -40 to +85 36 Ld 6x6 QFN L36.6x6
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both
SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
*Add “-T” suffix for tape and reel.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6313
Typical Application - ISL6313 with NTC Thermal Compensation
FB DVC VSEN RGND +5V VCC
COMP
RSET
APA
+5V
VCC
OFS
FS
REF
BOOT1
UGATE1
PHASE1
LGATE1
ISEN1-
ISEN1+
SS
IOUT
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PGOOD
EN
GND
ISL6313
PVCC
BOOT2
UGATE2
PHASE2
LGATE2
ISEN2-
ISEN2+
+12V
+12V
PLACE IN CLOSE
NTC
PROXIMITY
LOAD
5 FN6448.0
March 5, 2007
5 Page 
ISL6313
The output capacitors conduct the ripple component of the
inductor current. In the case of multi-phase converters, the
capacitor current is the sum of the ripple currents from each
of the individual channels. Compare Equation 1 to the
expression for the peak-to-peak current after the summation
of N symmetrically phase-shifted inductor currents in
Equation 2. Peak-to-peak ripple current decreases by an
amount proportional to the number of channels. Output
voltage ripple is a function of capacitance, capacitor
equivalent series resistance (ESR), and inductor ripple
current. Reducing the inductor ripple current allows the
designer to use fewer or less costly output capacitors.
IC(PP) =
(---V----I--N-----–-----N------⋅----V----O-----U----T---)----⋅----V----O----U-----T-
L ⋅ fS ⋅ VIN
(EQ. 2)
Another benefit of interleaving is to reduce input ripple
current. Input capacitance is determined in part by the
maximum input ripple current. Multiphase topologies can
improve overall system cost and size by lowering input ripple
current and allowing the designer to reduce the cost of input
capacitance. The example in Figure 2 illustrates input
currents from a three-phase converter combining to reduce
the total input ripple current.
The converter depicted in Figure 2 delivers 1.5V to a 36A load
from a 12V input. The RMS input capacitor current is 5.9A.
Compare this to a single-phase converter also stepping down
12V to 1.5V at 36A. The single-phase converter has 11.9A
RMS input capacitor current. The single-phase converter
must use an input capacitor bank with twice the RMS current
capacity as the equivalent three-phase converter.
INPUT-CAPACITOR CURRENT, 10A/DIV
clock, whose cycle time is the inverse of the switching
frequency set by the resistor connected to the FS pin. The
advantage of Intersil’s proprietary Active Pulse Positioning
(APP) modulator is that the PWM signal has the ability to
turn on at any point during this PWM time interval, and turn
off immediately after the PWM signal has transitioned high.
This is important because is allows the controller to quickly
respond to output voltage drops associated with current load
spikes, while avoiding the ring back affects associated with
other modulation schemes.
The PWM output state is driven by the position of the error
amplifier output signal, VCOMP minus the current correction
signal relative to the proprietary modulator ramp waveform
as illustrated in Figure 4. At the beginning of each PWM time
interval, this modified VCOMP signal is compared to the
internal modulator waveform. As long as the modified
VCOMP voltage is lower then the modulator waveform
voltage, the PWM signal is commanded low. The internal
MOSFET driver detects the low state of the PWM signal and
turns off the upper MOSFET and turns on the lower
synchronous MOSFET. When the modified VCOMP voltage
crosses the modulator ramp, the PWM output transitions
high, turning off the synchronous MOSFET and turning on
the upper MOSFET. The PWM signal will remain high until
the modified VCOMP voltage crosses the modulator ramp
again. When this occurs the PWM signal will transition low
again.
During each PWM time interval the PWM signal can only
transition high once. Once PWM transitions high it can not
transition high again until the beginning of the next PWM
time interval. This prevents the occurrence of double PWM
pulses occurring during a single period.
CHANNEL 3
INPUT CURRENT
CHANNEL 2
INPUT CURRENT
CHANNEL 1
INPUT CURRENT
1μs/DIV
FIGURE 2. CHANNEL INPUT CURRENTS AND INPUT-
CAPACITOR RMS CURRENT FOR 3-PHASE
CONVERTER
Active Pulse Positioning (APP) Modulated PWM
Operation
The ISL6313 uses a proprietary Active Pulse Positioning
(APP) modulation scheme to control the internal PWM
signals that command each channel’s driver to turn their
upper and lower MOSFETs on and off. The time interval in
which a PWM signal can occur is generated by an internal
EXTERNAL CIRCUIT
APA
ISL6313 INTERNAL CIRCUIT
CAPA
RAPA VAPA,TRIP
COMP
100µA
LOW
PASS
FILTER
+
APA
-
TO APA
CIRCUITRY
ERROR
AMPLIFIER
FIGURE 3. ADAPTIVE PHASE ALIGNMENT DETECTION
Adaptive Phase Alignment (APA)
To further improve the transient response, the ISL6313 also
implements Intersil’s proprietary Adaptive Phase Alignment
(APA) technique, which turns on all of the channels together
at the same time during large current step transient events.
As Figure 3 shows, the APA circuitry works by monitoring the
11 FN6448.0
March 5, 2007
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ISL6313.PDF ] | |
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