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PDF ISL28286 Data sheet ( Hoja de datos )

Número de pieza ISL28286
Descripción (ISL28286 / ISL28486) Dual Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op-Amp
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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®
Data Sheet
ISL28286, ISL28486
September 22, 2006
FN6312.0
Dual Micropower Single Supply
Rail-to-Rail Input and Output (RRIO)
Precision Op-Amp
The ISL28286 and ISL28486 are Dual and Quad channel
micropower precision operational amplifiers optimized for
single supply operation at 5V down to 2.4V. For equivalent
performance in a single channel op-amp reference EL8186.
The ISL28286 and ISL28486 feature an Input Range
Enhancement Circuit (IREC) which enables both parts to
maintain CMRR performance for input voltages equal to the
positive and negative supply rails. The input signal is
capable of swinging 10% above the positive supply rail and
to ground with only a slight degradation of the CMRR
performance. The output operation is rail to rail.
Both parts draw minimal supply current while meeting
excellent DC-accuracy, AC-performance, noise and output
drive specifications.
The ISL28286 and ISL28486 can be operated from a single
lithium cell or two Ni-Cd batteries. The input range includes
both positive and negative rail.
Orderingwww.DataSheet4U.com Information
PART TAPE &
PKG.
PART NUMBER MARKING REEL PACKAGE DWG. #
ISL28286FUZ
(See Note)
8286Z
50/Tube 10 Ld MSOP MDPOO43
(Pb-free)
ISL28286FUZ-T7 8286Z
(See Note)
7” 10 Ld MSOP MDP0043
(1500 pcs) (Pb-free)
Coming Soon
ISL28486FAZ
(Note)
28486FAZ 97/Tube 16 Ld QSOP MDP0040
(Pb-free)
Coming Soon 28486FAZ
7” 16 Ld QSOP MDP0040
ISL28486FAZ-T7
(1000 pcs) (Pb-free)
(Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• 120µA typ supply current for both channels
• 600µV max offset voltage
• 500pA typ input bias current
• 400kHz gain-bandwidth product
• 115dB PSRR and CMRR
• Single supply operation down to 2.4V
• Input is capable of swinging above V+ and to V- (ground
sensing)
• Rail-to-rail input and output (RRIO)
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




ISL28286 pdf
ISL28286, ISL28486
Typical Performance Curves (Continued)
120 80
80 40
40 0
0 -40
-40 -80
-80
1
-120
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FIGURE 5. AVOL vs FREQUENCY @ 100kΩ LOAD
100 200
80 150
PHASE
100
60
50
40
0
20
GAIN
-50
0 -100
-20 -150
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
FIGURE 6. AVOL vs FREQUENCY @ 1kΩ LOAD
120
110
100
90
80
70
60
PSRR -
50
40
30
VS = 5VDC
VSOURCE = 1Vp-p
20 RL = 100kΩ
10 AV = +1
0
10 100 1k
PSRR +
10k
FREQUENCY (Hz)
100k
FIGURE 7. PSRR vs FREQUENCY
1M
100
VS = 5VDC
90 VSOURCE = 1Vp-p
80 RL = 100kΩ
AV = +1
70
60
50
40
30
20
10
10
100 1k
10k
FREQUENCY (Hz)
100k
FIGURE 8. CMRR vs FREQUENCY
2.56
2.54
VIN
2.52
2.50
VOUT
2.48
2.46
2.44
VS = 5VDC
VOUT = 0.1Vp-p
RL = 500Ω
AV = +1
2.42
0 2 4 6 8 10 12 14 16 18 20
TIME (µs)
FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSE
5.0
VIN
4.0 VOUT
VS = 5VDC
3.0 VOUT = 0.1Vp-p
RL = 500Ω
2.0 AV = -2
1.0
VOUT
0 VIN
0 100 200 300 400 500
TIME (µs)
FIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE
5 FN6312.0
September 22, 2006

5 Page





ISL28286 arduino
ISL28286, ISL28486
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
1
0.9
0.8 870mW
0.7
0.6
0.5
0.4
θJA =M1S15O°PC8/W/10
0.3
0.2
0.1
0
0 25 50 75 85 100 125
AMBIENT TEMPERATURE (°C)
FIGURE 41. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
0.6
0.5
486mW
0.4
0.3
0.2
θJA =M2S06O°PC8/W/10
0.1
0
0 25 50 75 85 100 125
AMBIENT TEMPERATURE (°C)
FIGURE 42. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Pin Descriptions
ISL28286
ISL28486
EQUIVALENT
(10 LD MSOP) (16 LD QSOP) PIN NAME CIRCUIT
DESCRIPTION
1
3
IN+_A
Circuit 1 Amplifier A non-inverting input
2
EN_A
Circuit 2 Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
3 13 V- Circuit 4 Negative power supply
4
EN_B
Circuit 2 Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
5
5
IN+_B
Circuit 1 Amplifier B non-inverting input
6
6
IN-_B
Circuit 1 Amplifier B inverting input
7
7
OUT_B
Circuit 3 Amplifier B output
8 4 V+ Circuit 4 Positive power supply
9
1
OUT_A
Circuit 3 Amplifier A output
10
2
IN-_A
Circuit 1 Amplifier A inverting input
10
OUT_C
Circuit 3 Amplifier C output
11
IN-_C
Circuit 1 Amplifier C inverting input
12
IN+_C
Circuit 1 Amplifier C non-inverting input
14
IN+_D
Circuit 1 Amplifier D non-inverting input
15
IN-_D
Circuit 1 Amplifier D inverting input
16
OUT_D
Circuit 3 Amplifier D output
8, 9 NC
- No internal connection
IN-
CIRCUIT 1
V+
IN+
V-
LOGIC
PIN
V+
V-
CIRCUIT 2
V+
OUT
V-
CIRCUIT 3
V+
CAPACITIVELY
COUPLED
ESD CLAMP
V-
CIRCUIT 4
11 FN6312.0
September 22, 2006

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