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PDF HI5714 Data sheet ( Hoja de datos )
| Número de pieza | HI5714 | |
| Descripción | A/D Converter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
July 2004
HI5714
FN3973.6
8-Bit, 40/60/75/80 MSPS A/D Converter
The HI5714 is a high precision, monolithic, 8-bit, Analog-to-
Digital Converter fabricated in Intersil’ advanced HBC10
BiCMOS process.
The HI5714 is optimized for a wide range of applications such as
ultrasound imaging, mass storage, instrumentation, and video
digitizing, where accuracy and low power consumption are
essential. The HI5714 is offered in 40 MSPS, 60 MSPS, and 75
MSPS sample rates.
The HI5714 delivers ±0.4 LSB differential nonlinearity while
consuming only 325mW power (Typical) at 75 MSPS. The
digital inputs and outputs are TTL compatible, as well as
allowing for a low-level sine wave clock input.
Ordering Information
PART
NUMBER
TEMP.
RANGE
(°C)
PACKAGE
SAMPLING
FREQUENCY PKG.
(MHz) DWG. #
HI5714/4CB
0 to 70 24 Ld SOIC
40 M24.3
HI5714/4CBZ
(Note)
www.DataSheet4U.com
HI5714/7CB-T
0 to 70 24 Ld SOIC
(Pb-free)
0 to 70 24 Ld SOIC
Tape & Reel
40 M24.3
75 M24.3
HI5714/7CBZ-T 0 to 70 24 Ld SOIC
(Note)
Tape & Reel
(Pb-free)
75 M24.3
HI5714EVAL
25 Evaluation Board
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.
Features
• Sampling Rate . . . . . . . . . . . . . . . . . . . 40/60/75/80 MSPS
• Low Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .325mW
• 7.65 ENOB at 4.43MHz
• Overflow/Underflow Three-State TTL Output
• Operates with Low Level AC Clock
• Very Low Analog Input Capacitance
• No Buffer Amplifier Required
• No Sample and Hold Required
• TTL Compatible I/O
• Pin-Compatible to Philips TDA8714
• Pb-free Available
Applications
• Video Digitizing
• QAM Demodulator
• Digital Cable Setup Box
• Tape Drive/Mass Storage
• Medical Ultrasound Imaging
• Communication Systems
Pinout
HI5714 (SOIC)
TOP VIEW
D1 1
D0 2
NC 3
VRB 4
NC 5
AGND 6
VCCA 7
VIN 8
VRT 9
NC 10
O/UF 11
D7 12
24 D2
23 D3
22 OE
21 VCCO2
20 OGND
19 VCCO1
18 VCCD
17 DGND
16 CLK
15 D4
14 D5
13 D6
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Harris Corporation 1998. Copyright Intersil Americas Inc. 2003, 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
HI5714
Electrical Specifications VCCA = VCCD = VCCO = +5V; VRB = 1.3V; VRT = 3.6V; TA = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Analog Power Supply Range, VCCA
Digital Power Supply Range, VCCD
Output Power Supply Range, VCCO
Total Supply Current
4.75 5.0 5.25
V
4.75 5.0 5.25
V
4.75 5.0 5.25
V
- 65 75 mA
Supply Current, ICCA
Supply Current, ICCD
Supply Current, ICCO
Power Dissipation
- 30 - mA
- 26 - mA
- 9 - mA
- 325 375 mW
NOTES:
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. The supply voltages VCCA and VCCD may have any value between -0.3V and +6V as long as the difference VCCA - VCCD lies between
-0.3V and +0.3V.
4. In addition to a good layout of the digital and analog ground, it is recommended that the rise and fall times of the clock not be less than 1ns.
5. Analog input voltages producing code 00 up to and including FF. VOB (Bottom Offset Voltage) is the difference between the analog input which
produces data equal to 00 and the Bottom Reference Voltage (VRB). VOBTC (Bottom Offset Voltage Temperature Coefficient) is the variation
of VOB with temperature. VOT (Top Offset Voltage) is the difference between the Top Reference Voltage (VRT) and the analog input which
produces data output equal to FF. VOTTC (Top Offset Voltage Temperature Coefficient) is the variation of VOT with temperature.
6. Input is standard 5 step video test signal. A 12-bit R reconstruct DAC and VM700 are used for measurement.
7. Full scale sinewave, fIN = 4.43MHz.
8. fCLK = 75MHz, fIN = 4.43MHz, VIN = ±8 LSB at code 128, 50% Clock duty cycle.
9. Parameter is guaranteed by design, not production tested.
5
5 Page 
HI5714
ICL8069
REFERENCE
AMP
A/D
DSP/µP
D/A AMP
HA5020 (Single)
HA5022 (Dual)
HA5024 (Quad)
HA5013 (Triple)
HFA1105 (Single)
HFA1205 (Dual)
HFA1405 (Quad)
HI5714 (8-Bit)
HSP9501
HSP48410
HSP48908
HSP48901
HSP48212
HSP43881
HSP43168
HI1171 (8-Bit)
CA3338 (8-Bit)
HI5721 (10-Bit)
HI3050 (10-Bit)
HA5020 (Single)
HA2842 (Single)
HFA1115 (Single)
HFA1212 (Dual)
HFA1412 (Quad)
HSP9501: Programmable Data Buffer
HSP48410: Histogrammer/accumulating Buffer, 10-Bit Pixel Resolution, 4K x 4K Frame Size
HSP48908: 2-D Convolver, 3 x 3 Kernal Convolution, 8-Bit
HSP48901: 3 x 3 Image Filter, 30MHz, 8-Bit
HSP48212: Video Mixer
HSP43881: Digital Filter, 30MHz, 1-D and 2-D Fir Filters
HSP43168: Dual Fir Filter, 10-Bit, 33/45MHz
CMOS Logic Available in FCT
FIGURE 11. 8-BIT VIDEO COMPONENTS
Timing Definitions
Aperture Delay: Aperture delay is the time delay between
the external sample command (the rising edge of the clock)
and the time at which the signal is actually sampled. This
delay is due to internal clock path propagation delays.
Aperture Jitter: This is the RMS variation in the aperture
delay due to variation of internal clock path delays.
Data Latency
After the analog sample is taken, the data on the bus is
output at the next rising edge of the clock. This is due to the
output latch of the converter. This delay is specified as the
data latency. After the data latency time, the data
representing each succeeding sample is output at the
following clock pulse. The digital data lags the analog input
by 1 cycle.
Static Performance Definitions
Offset Error and Full-Scale Error use a measured value of
the external voltage reference to determine the ideal plus
and minus full-scale values. The results are all displayed in
LSBs.
Bottom Offset Voltage (VOB)
The first code transition should occur at a level 0.5 LSB
above the negative full-scale. Bottom offset voltage is
defined as the deviation of the actual code transition from
this point.
Top Offset Voltage (VOT)
The last code transition should occur for a analog input that
is 1.5 LSBs below positive full-scale. Top Offset Voltage is
defined as the deviation of the actual code transition from
this point.
Differential Linearity Error (DNL)
DNL is the worst case deviation of a code width from the
ideal value of 1 LSB. The converter is guaranteed to have no
missing codes.
Integral Linearity Error (INL)
INL is the worst case deviation of a code center from a best
fit straight line calculated from the measured data.
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet HI5714.PDF ] | |
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