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PDF HI1396Y Data sheet ( Hoja de datos )
| Número de pieza | HI1396Y | |
| Descripción | 125 MSPS Flash A/D Converter | |
| Fabricantes | Harris | |
| Logotipo |  |
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SEMICONDUCTOR
HI1396Y
April 1995
8-Bit, 125 MSPS Flash A/D Converter
Features
Description
• Differential Linearity Error . . . . ±0.5 LSB (Typ) or Less
• Integral Linearity Error. . . . . . . . ±0.5 LSB (Typ) or Less
• Built-In Integral Linearity Compensation Circuit
• Ultra High Speed Operation with Maximum
Conversion Rate of 125 MSPS (Min)
• Low Input Capacitance . . . . . . . . . . . . . . . . . 18pF (Typ)
• Wide Analog Input Bandwidth 200MHz (Min. for Full-
Scale Input)
• Single Power Supply . . . . . . . . . . . . . . . . . . . . . . . .-5.2V
• Low Power Consumption . . . . . . . . . . . . . 870mW (Typ)
• Low Error Rate
• Operable at 50% Clock Duty Cycle
• Capable of Driving 50Ω Loads
Applications
• Video Digitizing
• Communication Systems
• HDTV (High Definition TV) • Radar Systems
• Direct RF Down-Conversion • Digital Oscilloscopes
The HI1396Y is an 8-bit ultra high speed flash analog-to-dig-
ital converter IC capable of digitizing analog signals at the
maximum rate of 125MSPS. The digital I/O levels of the con-
verter are compatible with ECL 100K/10KH/10K.
The HI1396Y is available for Commercial and Industrial
applications and is supplied in die form.
Ordering Information
PART
NUMBER
TEMPERATURE
PACKAGE
HI1396Y
+25oC
Die
• All performance parameters are for packaged
devices when supplied by Harris.
www.DataSheet4U.com
Die Metallization Layer
PIN PIN
66 1
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright © Harris Corporation 1995
1
File Number 3954
1 page  
Pad Descriptions (Continued)
PAD
NUMBER SYMBOL
12 D0
I/O
O
STANDARD
VOLTAGE
LEVEL
ECL
13 D1
15 D2
16 D3
21 D4
24 D5
25 D6
26 D7
1
LINV
I
ECL
35
MINV
I
ECL
HI1396Y
EQUIVALENT CIRCUIT
DGND2
DI
DESCRIPTION
LSB of data outputs. External pull-
down resistor is required.
Data outputs. External pull-down re-
sistors are required.
DGND1
LINV
OR
MINV
R
R
R
DVEE
R
DVEE
MSB of data outputs. External pull-
down resistor is required.
Input for D0 (LSB) to D6 output po-
larity inversion (see A/D Output
Code Table). Pulled low when left
open.
Input for D7 (MSB) output polarity
inversion (see A/D Output Code Ta-
ble). Pulled low when left open.
-1.3V
51, 52,
56, 57
VIN
I VRT to VRB
AGND
VIN
VIN
AVEE
Analog input pads. These two pads
must be connected externally, since
they are not internally connected.
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HI1396Y.PDF ] | |
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