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PDF AZ7500B Data sheet ( Hoja de datos )

Número de pieza AZ7500B
Descripción (AZ7500B/C) PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Fabricantes BCD Semiconductor 
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Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
General Description
Features
AZ7500B/C
The AZ7500B/C is a voltage mode pulse width modu- · Stable 4.95V/5V Reference Voltage Trimmed to
lation switching regulator control circuit designed pri-
±1.0% Accuracy
marily for power supply control.
· Uncommitted Output TR for 200mA Sink or
Source Current
The AZ7500B/C consists of a reference voltage circuit, · Single-End or Push-Pull Operation Selected by
two error amplifiers, an on-chip adjustable oscillator, a
Output Control
dead-time control (DTC) comparator, a pulse-steering · Internal Circuitry Prohibits Double Pulse at Either
control flip-flop, and an output control circuit. The pre-
cision of voltage reference (VREF) is improved up to ±
·
Output
Complete PWM Control Circuit with Variable
1% through trimming and this provides a better output
Duty Cycle
voltage regulation. The AZ7500B/C provides for push- · On-Chip Oscillator With Master or Slave Opera-
pull or single-ended output operation, which can be
tion
selected through the output control.
The difference between AZ7500B and AZ7500C is that
they have 4.95V and 5V reference voltage respectively.
The AZ7500B/C is available in standard packages of
DIP-16 and SOIC-16.
Applications
· SMPS
· Back Light Inverter
· Charger
www.DataSheet4U.com
SOIC-16
DIP-16
Apr. 2006 Rev. 1. 2
Figure 1. Package Types of AZ7500B/C
BCD Semiconductor Manufacturing Limited
1

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AZ7500B pdf
Data Sheet
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
AZ7500B/C
Electrical Characteristics
TA = 25oC, VCC=20V, f=10KHz unless otherwise noted.
Parameter
Reference Section
Output Reference Voltage
for AZ7500B
Output Reference Voltage
for AZ7500C
Line Regulation
Load Regulation
Short-Circuit Output Current
Oscillator Section
Oscillator Frequency
Frequency Change with Temperature
Dead-Time Control Section
Input Bias Current
Maximum Duty Cycle,
Input Threshold Voltage
Error-Amplifier Section
Input Offset Voltage
Input Offset Current
Input Bias Current
Common-Mode Input Voltage Range
Open-Loop Voltage Gain
Unity-Gain Bandwidth
Common-Mode Rejection Ratio
Output Sink Current (Feedback)
Output Source Current (Feedback)
Symbol Conditions
Min Typ Max
VREF
VREF
RLINE
RLOAD
ISC
IREF=1mA
IREF=1mA, TA= -40 to 85oC
IREF=1mA
IREF=1mA, TA= -40 to 85oC
VCC = 7V to 36V
IREF=1mA to 10mA
VREF = 0V
4.90 4.95
4.85 4.95
4.95 5.0
4.9 5.0
2
1
10 35
5.0
5.05
5.05
5.1
25
15
50
CT=0.001µF, RT=30K,
40
fOSC CT=0.01µF, RT=12K
9.2 10 10.8
CT=0.01µF, RT=12K, TA= -40 9.0
12
to 85oC
f /T CT=0.01µF, RT=12K, TA= -40
to 85oC
1
IBIAS VCC=15V, V4= 0 to 5.25V
D(MAX) VCC=15V, V4= 0V,
Pin 13= VREF
VITH Zero Duty Cycle
Maximum Duty Cycle
-2 -10
45
3 3.3
0
VIO V3 = 2.5V
IIO V3 = 2.5V
IBIAS V3 = 2.5V
VCM VCC=7V to 36V
GVO VO =0.5V to 3.5V
BW
CMRR
ISINK VID = -15mV to -5V,
V3 = 0.7V
ISOURCE VID=15mV to 5V
V3 = 3.5V
2 10
25 250
0.2 1
-0.3 VCC-2
70 95
650
65 80
-0.3 -0.7
2
Unit
V
V
V
V
mV
mV
mA
KHz
%
µA
%
V
mV
nA
µA
V
dB
KHz
dB
mA
mA
Apr. 2006 Rev. 1. 2
BCD Semiconductor Manufacturing Limited
5

5 Page





AZ7500B arduino
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
Mechanical Dimensions
SOIC-16
Data Sheet
AZ7500B/C
Unit: mm(inch)
1.300(0.051)
1.000(0.039) 1.650(0.065)
7°
0.406(0.016)
B
0.700(0.028)
7°
0.250(0.010)
A
20:1
0.500(0.020)
0.600(0.024)
1°
5°
R0.200(0.008)
R0.200(0.008)
6.040(0.238)
3.940(0.155)
9.5°
8°
3°
7°
8°
8°
A
0.400(0.016)×45°
0.150(0.006)
0.250(0.010)
B
20:1
0.250(0.010)
0.200(0.008)MIN
C-C
50:1
C 0.200(0.008)
Sφ1.000(0.039)
Depth 0.200(0.008)
C
Apr. 2006 Rev. 1. 2
BCD Semiconductor Manufacturing Limited
11

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