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PDF NE570 Data sheet ( Hoja de datos )

Número de pieza NE570
Descripción Compandor
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No Preview Available ! NE570 Hoja de datos, Descripción, Manual

NE570
Compandor
The NE570 is a versatile low cost dual gain control circuit in which
either channel may be used as a dynamic range compressor or
expandor. Each channel has a full−wave rectifier to detect the average
value of the signal, a linerarized temperature−compensated variable
gain cell, and an operational amplifier.
The NE570 is well suited for use in cellular radio and radio
communications systems, modems, telephone, and satellite
broadcast/receive audio systems.
Features
Complete Compressor and Expandor in One IC
Temperature Compensated
Greater than 110 dB Dynamic Range
Operates Down to 6.0 VDC
System Levels Adjustable with External Components
Distortion may be Trimmed Out
Pb−Free Packages are Available*
Applications
Cellular Radio
Telephone Trunk Comandor
High Level Limiter
Low Level Expandor − Noise Gate
Dynamic Noise Reduction Systems
Voltage−Controlled Amplifier
Dynamic Filters
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MAXIMUM RATINGS
Rating
Symbol Value
Unit
Maximum Operating Voltage
VCC 24 VDC
Operating Ambient Temperature Range
TA 0 to +70 °C
Operating Junction Temperature
TJ 150 °C
Power Dissipation
PD 400 mW
Thermal Resistance, Junction−to−Ambient RqJA
105 °C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
DG CELL IN
RECT IN
THD TRIM
R2 20 kW VARIABLE
GAIN
R1 10 kW
RECTIFIER
R3
R3
20 kW
INVERTER IN
R4
30 kW
VREF
1.8 V
+
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MARKING
DIAGRAM
16
1
SOIC−16 WB
D SUFFIX
CASE 751G
NE570D
AWLYYWWG
1
Plastic Small Outline Package;
16 Leads; Body Width 7.5 mm
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
RECT_CAP_1 1
RECT_IN_1 2
DG_CELL_IN_1 3
GND 4
INV_IN_1 5
RES_R3_1 6
OUTPUT_1 7
THD_TRIM_1 8
16 RECT_CAP_2
15 RECT_IN_2
14 DG_CELL_IN_2
13 VCC
12 INV_IN_2
11 RES_R3_2
10 OUTPUT_2
9 THD_TRIM_2
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
OUTPUT
RECT CAP
Figure 1. Block Diagram
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 4
1
Publication Order Number:
NE570/D

1 page




NE570 pdf
NE570
BASIC CIRCUIT HOOK−UP AND OPERATION
Figure 5 shows the block diagram of one half of the chip,
(there are two identical channels on the IC). The full−wave
averaging rectifier provides a gain control current, IG, for the
variable gain (DG) cell. The output of the DG cell is a current
which is fed to the summing node of the operational
amplifier. Resistors are provided to establish circuit gain and
set the output DC bias.
THD_TRIM R3
INV. IN
DG_CELL_IN
R2
20 kW
3, 14
RECT_IN
R1
10 kW
2, 15
8, 9
DG
6, 11
R3
20 kW
5, 12
IG
30
R4
kW
VREF
1.8 V
+
1, 16
CRECT
7, 10
OUTPUT
VCC: PIN 13
GND: PIN 4
Figure 5. Chip Block Diagram (1 of 2 Channels)
The circuit is intended for use in single power supply
systems, so the internal summing nodes must be biased at
some voltage above ground. An internal band gap voltage
reference provides a very stable, low noise 1.8 V reference
denoted VREF. The non−inverting input of the op amp is tied
to VREF, and the summing nodes of the rectifier and DG cell
(located at the right of R1 and R2) have the same potential.
The THD_TRIM pin is also at the VREF potential.
Figure 6 shows how the circuit is hooked up to realize an
expander. The input signal, VIN, is applied to the inputs of
both the rectifier and the DG cell. When the input signal
drops by 6.0 dB, the gain control current will drop by a factor
of 2, and so the gain will drop 6 dB. The output level at VOUT
will thus drop 12 dB, giving us the desired 2−to−1
expansion.
R3
*CIN1 R2
DG
VIN
*CIN2 R1
R4 VREF +
VOUT
Figure 7 shows the hook−up for a compressor. This is
essentially an expander placed in the feedback loop of the op
amp. The DG cell is set−up to provide AC feedback only, so
a separate DC feedback loop is provided by the two RDC and
CDC. The values of RDC will determine the DC bias at the
output of the op amp. The output will bias to:
ǒ ǓVOUT DC +
1
)
RDC1
)
R4
RDC2
VREF
ǒ ǓVOUT DC +
1
)
RDC TOT
30 kW
1.8 V
The output of the expander will bias up to:
ǒ ǓVOUT DC +
1
)
R3
R4
VREF
ǒ ǓVOUT DC +
1
)
20
30
kW
kW
1.8 V + 3.0 V
The output will bias to 3.0 V when the internal resistors
are used. External resistors may be placed in series with R3,
(which will affect the gain), or in parallel with R4 to raise the
DC bias to any desired value.
R2
DG
R1
*RDC
*CIN R3
VIN
R4 VREF
+
*CRECT
*RDC
*CDC
*CF
VOUT
NOTES:
ǒ ǓGAIN =
R1 R2 IB 1
2 R3 VIN(avg.) 2
IB = 140 mA
* EXTERNAL COMPONENTS
Figure 7. Basic Compressor
NOTES:
2
2 R3 VIN (Avg.)
GAIN =
R1 R2 IB
IB = 140 mA
*CRECT
* EXTERNAL COMPONENTS
Figure 6. Basic Expander
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