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PDF LSN2 Data sheet ( Hoja de datos )
| Número de pieza | LSN2 | |
| Descripción | 6/10/16A Selectable-Output DC/DC Converters | |
| Fabricantes | C&D Technologies | |
| Logotipo |  |
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® LSN2 Series
Non-isolated, DOSA-SIP, 6/10/16A Selectable-Output DC/DC Converters
FEATURES
■ User-selectable outputs: 0.75-5V
(D12 models) or 0.75-3.3V (W3 models)
■ 6, 10 or 16A maximum output current
■ Double lead free to RoHS standards
■ Selectable phased start-up sequencing
and tracking
■ Wide range VIN 8.3-14V or 2.4-5.5V
■ Up to 52 Watts total output power
■ Very high efficiency up to 95%
■ Starts up into pre-biased load
■ Fast settling, high di/dt IOUT slew rate
DESCRIPTION
These miniature point-of-load (POL) switching
DC/DC converters are ideal regulation and supply
elements for distributed power and intermedi-
ate bus architectures. Fully compatible with
the Distributed-power Open Standards Alliance
specification (www.dosapower.com), LSN2’s can
power CPU’s, programmable logic and mixed-
voltage systems with little heat and low noise. A
typical application uses a master isolated 12 or
5Vdc supply and individual LSN2 converters for
local 1.8 and 3.3Vdc supplies. All system isolation
resides in the central supply, leaving lower cost
POL regulation at the load. The LSN2’s can deliver
very high power (to 52 Watts) in a tiny area with-
out heat sinking or external components. They
feature quick transient response (to 25μsec) and
very fast current slew rates (to 20A/μsec).
ORDERING GUIDE SUMMARY
Model
VOUT Range
LSN2-T/6-W3
0.75-3.3V
LSN2-T/6-D12
0.75-5V
LSN2-T/10-W3
0.75-3.3V
LSN2-T/10-D12
0.75-5V
LSN2-T/16-W3
0.75-3.3V
LSN2-T/16-D12
0.75-5V
IOUT Range
0-6A
0-6A
0-10A
0-10A
0-16A
0-16A
VIN Range
2.4-5.5V
8.3-14V
2.4-5.5V
8.3-14V
2.4-5.5V
8.3-14V
Ripple/Noise
15mVp-p
15mVp-p
15mVp-p
30mVp-p
25mVp-p
30mVp-p
Efficiency
94%
95%
95%
95%
95%
94%
INPUT CHARACTERISTICS
Parameter
Voltage Range
Current, full power
Undervoltage Shutdown
Short Circuit Current
Remote On/Off Control
Typ. @ 25°C, full load
2.4-5.5 or 8.3-14V
4.22 to 11.12A
Included
60mA
Positive or negative polarity
Notes
5V or 12V nominal models
Model dependent
With autorestart hysteresis
Output is short circuited
Default polarity is positive
OUTPUT CHARACTERISTICS
Parameter
Voltage
Current
Power Dissipation
Accuracy
Ripple & Noise
Line and Load Regulation
Overcurrent Protection
Overtemperature Protection
Efficiency (minimum)
Efficiency (typical)
Typ. @ 25°C, full load
0.75-3.3 or 0.75-5V
0-6, 0-10 or 0-16A
20, 33, 52W max.
±2% of VNOM
15-75mVpp
±0.03%
Hiccup autorecovery
+115°C shutdown
92-93%
94-95%
Notes
User adjustable, model dependent
Three ranges, model dependent
Three values, model dependent
50% load
Model dependent
Continuous short circuit protection
Model dependent
Model dependent
GENERAL SPECIFICATIONS
Parameter
Transient Response
Operating Temperature Range
Safety
EMI
Typ. @ 25°C, full load
25μsec
–40 to +85°C
UL/IEC/EN 60950
FCC pt.15, class B
Notes
50% load step to 2% of final value
With 200 lfm airflow
And CSA C22.2-No.234
MECHANICAL CHARACTERISTICS
6 Amp output models
0.50 x 1.00 x 0.275 inches (12.7 x 25.4 x 6.98 mm)
10 & 16 Amp models
0.50 x 2.00 x 0.32 inches (12.7 x 50.8 x 8.13 mm)
Pb
Lead-free
construction/attach
www.cd4power.com
LSN2 Series Page 1 of 14
1 page  
® LSN2 Series
Non-isolated, DOSA-SIP, 6/10/16A Selectable-Output DC/DC Converters
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Figure 2. Measuring Input Ripple Current
Output ripple/noise (also referred to as periodic and random deviations or
PARD) may be reduced below specified limits with the installation of additional
external output capacitors. Output capacitors function as true filter elements
and should be selected for bulk capacitance, low ESR, and appropriate fre-
quency response. Any scope measurements of PARD should be made directly
at the DC/DC output pins with scope probe ground less than 0.5" in length.
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Figure 3. Measuring Output Ripple/Noise (PARD)
All external capacitors should have appropriate voltage ratings and be located
as close to the converters as possible. Temperature variations for all relevant
parameters should be taken into consideration.
The most effective combination of external I/O capacitors will be a function
of your line voltage and source impedance, as well as your particular load
and layout conditions. Our Applications Engineers can recommend potential
solutions and discuss the possibility of our modifying a given device’s internal
filtering to meet your specific requirements. Contact our Applications Engineer-
ing Group for additional details.
Input Fusing
Most applications and or safety agencies require the installation of fuses at
the inputs of power conversion components. The LSN2 Series are not inter-
nally fused. Therefore, if input fusing is mandatory, either a normal-blow or a
slow-blow fuse with a value no greater than twice the maximum input current
calculated at low line with the converter's minimum efficiency should be
installed within the ungrounded input path to the converter.
Safety Considerations
LSN2 SIPs are non-isolated DC/DC converters. In general, all DC/DC's
must be installed, including considerations for I/O voltages and spacing/sepa-
ration requirements, in compliance with relevant safety-agency speci-
fications (usually UL/IEC/EN60950).
In particular, for a non-isolated converter's output voltage to meet SELV
(safety extra low voltage) requirements, its input must be SELV compliant.
If the output needs to be ELV (extra low voltage), the input must be ELV.
Input Overvoltage and Reverse-Polarity Protection
LSN2 SIP Series DC/DC's do not incorporate either input overvoltage or input
reverse-polarity protection. Input voltages in excess of the specified absolute
maximum ratings and input polarity reversals of longer than "instantaneous"
duration can cause permanent damage to these devices.
Start-Up Time
The VIN to VOUT Start-Up Time is the interval between the time at which a
ramping input voltage crosses the lower limit of the specified input volt-
age range and the fully loaded output voltage enters and remains within its
specified accuracy band. Actual measured times will vary with input source
impedance, external input capacitance, and the slew rate and final value of
the input voltage as it appears to the converter.
The On/Off to VOUT Start-Up Time assumes the converter is turned off via the
On/Off Control with the nominal input voltage already applied to the converter.
The specification defines the interval between the time at which the converter
is turned on and the fully loaded output voltage enters and remains within its
specified accuracy band. See Typical Performance Curves.
Remote Sense
LSN2 Series offer an output sense function. The sense function enables point-
of-use regulation for overcoming moderate IR drops in conductors and/or
cabling. Since these are non-isolated devices whose inputs and outputs usu-
ally share the same ground plane, sense is provided only for the +Output.
The remote sense line is part of the feedback control loop regulating the
DC/DC converter’s output. The sense line carries very little current and
consequently requires a minimal cross-sectional-area conductor. As such,
it is not a low-impedance point and must be treated with care in layout and
cabling. Sense lines should be run adjacent to signals (preferably ground), and
in cable and/or discrete-wiring applications, twisted-pair or similar techniques
should be used. To prevent high frequency voltage differences between VOUT
and Sense, we recommend installation of a 1000pF capacitor close to the
converter.
The sense function is capable of compensating for voltage drops between the
+Output and +Sense pins that do not exceed 10% of VOUT.
[VOUT(+) – Common] – [Sense(+) – Common] ≤ 10%VOUT
Power derating (output current limiting) is based upon maximum output
current and voltage at the converter's output pins. Use of trim and sense
functions can cause the output voltage to increase, thereby increasing output
power beyond the LSN2's specified rating. Therefore:
(VOUT at pins) x (IOUT) ≤ rated output power
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LSN2 Series Page 5 of 14
5 Page 
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Figure 12. Wiring for Simultaneous Phasing
Figure 12 shows a basic Master (POL A) and Slave (POL B) connected so the
POL B ramps up identically to POL A as shown in timing diagram, Figure 8. RC
network R1 and C1 charge up at a rate set by the R1-C1 time constant, giving
a roughly linear ramp. As POL A reaches 3.3VOUT (the setpoint of POL B), POL
B will stop rising. POL A then continues rising until it reaches 5V. R1 should be
significantly smaller than the internal bias current resistor from the Sequence
pin. Start with a 20kΩ value. We assume that the critical phase is only on
power up therefore there is no provision for ramped power down.
Figure 13 shows a single POL and the same RC network. However, we have
added a FET at Q1 as an up/down control. When VIN power is applied to the
POL, Q1 is biased on, shorting out the Sequence pin. When Q1’s gate is biased
off, R1 charges C1 and the POL’s output ramps up at the R1-C1 slew rate.
Note: Q1’s gate would typically be controlled from some external digital logic.
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Figure 13. Self-Ramping Power Up
If you wish to have a ramped power down (rather than a step down), add a
small resistor in series with Q1’s drain.
Figure 14 shows both a RC ramp on Master POL A and a proportional tracking
divider (R2 and R3) on POL B. We have also added an optional very small
noise filter cap at C2. Figure 14’s circuit corresponds roughly to Figure 9’s
timing for power up.
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Figure 15. Sequence/Track Simplified Equivalent Schematic
Guidelines for Sequence/Track Applications
[1] Leave the converter’s On/Off Enable control (if installed) in the On setting.
Normally, you should just leave the On/Off pin open.
[2] Allow the converter to stabilize (typically less than 20 mS after +VIN
power on) before raising the Sequence input. Also, if you wish to have a
ramped power down, leave +VIN powered all during the down ramp. Do
not simply shut off power.
[3] If you do not use the Sequence/Track pin, leave it open or tied to +VIN.
[4] Observe the Output slew rate relative to the Sequence input. A rough
guide is 2 Volts per millisecond maximum slew rate. If you exceed this
slew rate on the Sequence pin, the converter will simply ramp up at
it’s maximum output slew rate (and will not necessarily track the faster
Sequence input). The reason to carefully consider the slew rate limitation
is in case you want two different POL’s to precisely track each other.
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LSN2 Series Page 11 of 14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LSN2.PDF ] | |
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