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PDF MC14518B Data sheet ( Hoja de datos )
| Número de pieza | MC14518B | |
| Descripción | (MC14518B / MC14520B) Dual Up Counters | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC14518B, MC14520B
Dual Up Counters
The MC14518B dual BCD counter and the MC14520B dual binary
counter are constructed with MOS P−channel and N−channel
enhancement mode devices in a single monolithic structure. Each
consists of two identical, independent, internally synchronous 4−stage
counters. The counter stages are type D flip−flops, with interchangeable
Clock and Enable lines for incrementing on either the positive−going or
negative−going transition as required when cascading multiple stages.
Each counter can be cleared by applying a high level on the Reset line.
In addition, the MC14518B will count out of all undefined states within
two clock periods. These complementary MOS up counters find
primary use in multi−stage synchronous or ripple counting applications
requiring low power dissipation and/or high noise immunity.
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Internal and External Speeds
• Logic Edge−Clocked Design − Incremented on Positive Transition of
Clock or Negative Transition on Enable
• Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• This Device is Pb−Free and is RoHS Compliant
http://onsemi.com
SOIC−16 WB
DW SUFFIX
CASE 751G
PIN ASSIGNMENT
CA
EA
Q0A
Q1A
Q2A
Q3A
RA
VSS
1
2
3
4
5
6
7
8
16 VDD
15 RB
14 Q3B
13 Q2B
12 Q1B
11 Q0B
10 EB
9 CB
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1)
Symbol
Parameter
Value
VDD DC Supply Voltage Range
−0.5 to +18.0
Unit
V
MARKING DIAGRAM
16
Vin, Vout
Iin, Iout
PD
TA
Tstg
TL
Input or Output Voltage Range
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 2)
Operating Temperature Range
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
−0.5 to VDD + 0.5
V
±10 mA
500 mW
−55 to +125
−65 to +150
260
°C
°C
°C
145xxB
AWLYYWWG
1
xx
A
WL, L
YY, Y
WW, W
G
= 18 or 20
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout
should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 8
1
Publication Order Number:
MC14518B/D
1 page  
MC14518B, MC14520B
PULSE
GENERATOR
VDD
C Q0
Q1
Q2
E
R
Q3
VSS
20 ns
CLOCK
INPUT
CL CL CL CL
Q
tWH
tPLH
tr
20 ns
90%
50%
10%
tWL
tPHL
VDD
VSS
90% 50%
10%
tf
Figure 2. Switching Time Test Circuit and Waveforms
CLOCK
ENABLE
RESET
MC14518B
Q0
Q1
Q2
Q3
MC14520B
Q0
Q1
Q2
Q3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
12345678901234567890
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4
Figure 3. Timing Diagram
http://onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC14518B.PDF ] | |
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