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PDF MC74VHCT00A Data sheet ( Hoja de datos )
| Número de pieza | MC74VHCT00A | |
| Descripción | Quad 2-Input NAND Gate | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC74VHCT00A
Quad 2- Input NAND Gate
The MC74VHCT00A is an advanced high speed CMOS 2--input
NAND gate fabricated with silicon gate CMOS technology. It
achieves high speed operation while maintaining CMOS low power
dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL--type input thresholds and the
output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic--level translator from 3.0 V
CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high--voltage power supply.
The MC74VHCT00A input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHCT00A to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when VCC = 0 V.
These input and output structures help prevent device destruction caused
by supply voltage -- input/output voltage mismatch, battery backup, hot
insertion, etc.
• High Speed: tPD = 5.0 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 2 μA (Max) at TA = 25°C
• TTL--Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V www.DataSheet4U.com
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 3.0 V to 5.5 V Operating Range
• Low Noise: VOLP = 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: 48 FETs or 12 Equivalent Gates
• These devices are available in Pb--free package(s). Specifications herein
apply to both standard and Pb--free devices. Please see our website at
www.onsemi.com for specific Pb--free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
http://onsemi.com
MARKING DIAGRAMS
14
1
SOIC--14
D SUFFIX
CASE 751A
VHCT00A
AWLYYWW
14
1
TSSOP--14
DT SUFFIX
CASE 948G
VHCT
00A
AWLYWW
14
1
SOIC EIAJ--14
M SUFFIX
CASE 965
VHCT00A
ALYW
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
© Semiconductor Components Industries, LLC, 2006
March, 2006 -- Rev. 3
ORDERING INFORMATION
Device
Package
Shipping
MC74VHCT00AD
SOIC--14 48 Units/Rail
MC74VHCT00ADR2 SOIC--14 2500 Units/Reel
MC74VHCT00ADT TSSOP--14 96 Units/Rail
MC74VHCT00ADTEL TSSOP--14 2000 Units/Reel
MC74VHCT00ADTR2
MC74VHCT00AM
MC74VHCT00AMEL
TSSOP--14 2000 Units/Reel
SOIC
EIAJ--14
48 Units/Rail
SOIC
EIAJ--14
2000 Units/Reel
1 Publication Order Number:
MC74VHCT00A/D
1 page  
MC74VHCT00A
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns
TA = 25°C
Symbol
Parameter
Test Conditions
Min Typ Max
tPLH,
tPHL
Maximum
Propogation Delay,
Input A or B to Y
VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
CL = 15 pF
CL = 50 pF
CL = 15 pF
CL = 50 pF
4.1 10.0
5.5 13.5
3.1 6.9
3.6 7.9
CIN Maximum Input
Capacitance
5.5 10
TA ≤ 85°C
Min Max
11.0
15.0
8.0
9.0
10
TA ≤ 125°C
Min Max
13.0
17.5
9.5
10.5
10
Unit
ns
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (Note 7)
17 pF
7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current
power consumption; PD =
can be obtained
CPD ¯ VCC2 ¯ fin
by the
+ ICC
equation:
¯ VCC.
ICC(OPR)
=
CPD
¯
VCC
¯
fin
+
ICC.
CPD
is
used
to
determine
the
no--
load
dynamic
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, Measured in SO Package)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TA = 25°C
Typ Max
0.4 0.8
-- 0.4
-- 0.8
2.0
0.8
Unit
V
V
V
V
A or B
50%
Y
tPLH
50% VCC
3.0 V
GND
tPHL
VOH
VOL
Figure 5. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 6. Test Circuit
INPUT
Figure 7. Input Equivalent Circuit
OUTPUT
*
*Parastic Diode
Figure 8. Output Equivalent Circuit
http://onsemi.com
5
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC74VHCT00A.PDF ] | |
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