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PDF MC74VHC574 Data sheet ( Hoja de datos )
| Número de pieza | MC74VHC574 | |
| Descripción | Octal D-Type Flip-Flop | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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ON Semiconductort
Octal D−Type Flip−Flop
with 3−State Output
The MC74VHC574 is an advanced high speed CMOS octal
flip−flip with 3−state output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
This 8−bit D−type flip−flop is controlled by a clock input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
• High Speed: fmax = 180MHz (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4μA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 1.2V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
www.DataSheet4U.com
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 266 FETs or 66.5 Equivalent Gates
w These devices are available in Pb−free package(s). Specifications herein
apply to both standard and Pb−free devices. Please see our website at
www.onsemi.com for specific Pb−free orderable part numbers, or
contact your local ON Semiconductor sales office or representative.
MC74VHC574
DW SUFFIX
20−LEAD SOIC WIDE PACKAGE
CASE 751D−05
DT SUFFIX
20−LEAD TSSOP PACKAGE
CASE 948E−02
M SUFFIX
20−LEAD SOIC EIAJ PACKAGE
CASE 967−01
ORDERING INFORMATION
MC74VHCXXXDW SOIC WIDE
MC74VHCXXXDT
TSSOP
MC74VHCXXXM
SOIC EIAJ
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 5
1
Publication Order Number:
MC74VHC574/D
1 page  
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Parameter
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
TIMING REQUIREMENTS (Input tr = tf = 3.0ns)
Symbol
tsu
Parameter
Minimum Setup Time, D to CP
th Minimum Hold Time, CP to D
tw Minimum Pulse Width, CP
Test Conditions
VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
TA = 25°C
Typ Max
0.9 1.2
− 0.9
− 1.2
— 3.5
— 1.5
Unit
V
V
V
V
TA = 25°C
Typ Limit
— 3.5
— 3.5
— 1.5
— 1.5
— 5.0
— 5.0
TA = − 40
to 85°C
Limit
3.5
3.5
1.5
1.5
5.5
5.0
Unit
ns
ns
ns
CP 50%
tw
1/fmax
tPLH
tPHL
Q 50% VCC
VCC
GND
OE 50%
tPZL tPLZ
Q 50% VCC
tPZH tPHZ
Q 50% VCC
Figure 3. Switching Waveforms
VCC
GND
HIGH
IMPEDANCE
VOL +0.3V
VOH −0.3V
HIGH
IMPEDANCE
VALID
D 50%
tsu th
CP 50%
Figure 4.
VCC
GND
VCC
GND
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 5.
http://onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC74VHC574.PDF ] | |
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