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PDF MC74LCX74 Data sheet ( Hoja de datos )

Número de pieza MC74LCX74
Descripción LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
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MC74LCX74
Low−Voltage CMOS Dual
D−Type Flip−Flop
With 5 V−Tolerant Inputs
The MC74LCX74 is a high performance, dual D−type flip−flop
with asynchronous clear and set inputs and complementary (O, O)
outputs. It operates from a 2.3 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX74 inputs
to be safely driven from 5.0 V devices.
The MC74LCX74 consists of 2 edge−triggered flip−flops with
individual D−type inputs. The flip−flop will store the state of
individual D inputs, that meet the setup and hold time requirements, on
the LOW−to−HIGH Clock (CP) transition.
Features
Designed for 2.3 V to 3.6 V VCC Operation
5.0 V Tolerant Inputs − Interface Capability With 5.0 V TTL Logic
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
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Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
Pb−Free Packages are Available*
14
1
http://onsemi.com
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
1
LCX74G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LCX
74
ALYWG
G
1
14
1
14
SOEIAJ−14
M SUFFIX
CASE 965
74LCX74
ALYWG
1
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G = Pb−Free Package
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
May, 2005 − Rev. 5
1
Publication Order Number:
MC74LCX74/D

1 page




MC74LCX74 pdf
MC74LCX74
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Characteristic
Condition
TA = +25°C
Min Typ Max
Unit
VOLP
Dynamic LOW Peak Voltage
(Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
V
VOLV
Dynamic LOW Valley Voltage
(Note 4)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
V
4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
Typical
Unit
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
VCC = 3.3 V, VI = 0 V or VCC
VCC = 3.3 V, VI = 0 V or VCC
10 MHz, VCC = 3.3 V, VI = 0 V or VCC
7 pF
8 pF
25 pF
Vcc
Dn Vmi
CPn
ts
th
Vmi
tw
0V
Vcc
fmax
tPLH, tPHL
0V
VOH
On, Vmo
On
VOL
WAVEFORM 1 − PROPAGATION DELAYS, SETUP AND HOLD TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
SDn
CDn
On
On
tPLH
Vmo
1.5 V
tPHL
Vmo
tPHL
Vmo
tPLH
Vmo
WAVEFORM 2 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 3. AC Waveforms
http://onsemi.com
5
Vcc
0V
Vcc
0V
VOL
VOH

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