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PDF MC74LCX125 Data sheet ( Hoja de datos )

Número de pieza MC74LCX125
Descripción Low-Voltage CMOS Quad Buffer
Fabricantes ON Semiconductor 
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No Preview Available ! MC74LCX125 Hoja de datos, Descripción, Manual

MC74LCX125
Low−Voltage CMOS
Quad Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The MC74LCX125 is a high performance, non−inverting quad
buffer operating from a 2.3 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX125 inputs
to be safely driven from 5.0 V devices. The MC74LCX125 is suitable
for memory address driving and all TTL level bus oriented transceiver
applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
Features
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
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LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance: Human Body Model >2000 V
Machine Model >200 V
Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LCX125G
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LCX
125
ALYWG
G
1
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G = Pb−Free Package
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
May, 2005 − Rev. 5
1
Publication Order Number:
MC74LCX125/D

1 page




MC74LCX125 pdf
MC74LCX125
Dn Vmi
tPLH
On
Vmo
Vmi
tPHL
Vmo
VCC
0V
VOH
VOL
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
OEn
On
On
tPZH
tPZL
Vmi
tPHZ
Vmo
tPLZ
Vmo
Vmi
VCC
0V
VCC
VOH − 0.3 V
0V
3.0 V
VOL + 0.3 V
GND
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Symbol
Vmi
Vmo
3.3 V ± 0.3 V
1.5 V
1.5 V
VCC
2.7 V
1.5 V
1.5 V
2.5 V ± 0.2 V
VCC/2
VCC/2
Figure 3. AC Waveforms
VCC
PULSE
GENERATOR
DUT
RT
CL RL
CL = 50 pF at VCC = 3.3 0.3 V or equivalent (includes jig and probe capacitance)
CL = 30 pF at VCC = 2.5 0.2 V or equivalent (includes jig and probe capacitance)
RL = R1 = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50 W)
Figure 4. Test Circuit
http://onsemi.com
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