|
|
PDF SPEAR-07-NC03 Data sheet ( Hoja de datos )
| Número de pieza | SPEAR-07-NC03 | |
| Descripción | Ethernet Communication Controller | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SPEAR-07-NC03 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
SPEAR-07-NC03
Ethernet Communication Controller with USB-Host
Features
■ Based on ARM720T (8K Caches and MMU
included)
■ Support a 10/100 Mbits/s Ethernet connection
(IEEE802.3)
■ Full-Speed USB Host Controller, supports
12Mbit/s Full Speed Devices
■ UART Interface: 115KBaud
■ I2C interface: Fast and Slow.
■ IEEE1284 Host Controller
■ Real Time Clock
■ Timers and Watchdog peripherals
■ Integrated PLL (25MHz Input, 48MHz Output)
■ Up to 12 GPIOs (including IEEE1284 port)
■ 8K SRAM shared with an External
Microprocessor
■ Static Memory Controller (up to 2 Banks, Max
16M each)
Order codes
Part number
SPEAR-07-NC03
Op. Temp. range, °C
-40 to +105
LFBGA180 (12x12x1.7mm)
■ DRAM Controller SDRAM/EDO (up to 4 Banks,
Max 32M each)
■ External I/O Banks: 2 x 16KB.
■ Package LFBGA 180 (12x12mm x1.7mm)
Description
SPEAR-07-NC03 is a smart Communication
Controller for USB and Ethernet Communication.
SPEAR-07-NC03 allows the sharing of a Full-
Speed USB or IEEE1284 or a UART Peripherals
inside an Ethernet System.
SPEAR-07-NC03 is supported by several
Operation Systems such as eCOS.
Package
LFBGA180
Packing
Tray
May 2006
Rev 5
1/194
www.st.com
1
1 page  
SPEAR-07-NC03
Table of Contents
6.16
6.17
6.15.2 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
6.15.3 Registers Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
RESET and Clock Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
6.16.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
PLL (Frequency synthesizer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
6.17.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179
6.17.2 Global Configuration Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
6.17.3 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
6.17.4 Registers Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
7 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
7.1 Absolute Maximum Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186
7.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
7.3 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
7.3.1 POWERGOOD timing requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
7.4 AC Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
7.5 External Memory Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
7.5.1 Timings for External CPU writing access . . . . . . . . . . . . . . . . . . . . . . . . . . 189
7.5.2 Timings for External CPU reading access . . . . . . . . . . . . . . . . . . . . . . . . . . 190
8 Reference Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
9 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
5/194
5 Page 
SPEAR-07-NC03
● DMA-based Data Transfer Capability for ECP
● Fully Software Controllable Operation Mode
2.12 USB Host Controller
● Full-Speed USB compliant
● Supports Low Speed and Full Speed Devices
● Configuration data stored in Port Configurable Block
● Single 48 MHz input clock
● Integrated Digital PLL
2.13 Shared SRAM
● External Processor Communication Purpose
● Shared SRAM Bus Arbiter
● Same address can be accessed at the same time
● Separated from AHB Bus for Bus Traffic Reduce
● Interrupt Output Generation for Transfer Notification
2.14 Real Time Clock
● Real time clock-calendar (RTC)
● Clocked by 32.768MHz low power clock input
● Separated power supply (1.8 V)
● 14 digits (YYYY MM DD hh mm ss) precision
2.15 Frequency Synthesizer
● On-chip Frequency Synthesizer Provided
– Fin: 25 MHz.
– Fout: 48 MHz
2 Features
11/194
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SPEAR-07-NC03.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SPEAR-07-NC03 | Ethernet Communication Controller | ST Microelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |