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PDF MAX3349EA Data sheet ( Hoja de datos )

Número de pieza MAX3349EA
Descripción USB 2.0 Full Speed TRansceiver
Fabricantes Maxim Integrated Products 
Logotipo Maxim Integrated Products Logotipo



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19-0667; Rev 0; 10/06
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USB 2.0 Full-Speed Transceiver with UART
Multiplexing Mode
General Description
The MAX3349EA ±15kV ESD-protected, USB transceiv-
er provides a full-speed USB interface to a lower voltage
microprocessor or ASIC. The device supports enumera-
tion, suspend, and VBUS detection. A special UART
multiplexing mode routes external UART signals (Rx and
Tx) to D+ and D-, allowing the use of a shared connec-
tor to reduce cost and part count for mobile devices.
The UART interface allows mobile devices such as
PDAs, cellular phones, and digital cameras to use either
UART or USB signaling through the same connector.
The MAX3349EA features a separate UART voltage sup-
ply input to support legacy devices using +2.75V signal-
ing. The MAX3349EA supports a maximum UART baud
rate of 921kbaud.
Upon connection to a USB host, the MAX3349EA enters
USB mode and provides a full-speed USB 2.0 compliant
interface through VP, VM, RCV, and OE. The
MAX3349EA features internal series termination resistors
on D+ and D-, and an internal 1.5kpullup resistor to
D+ to allow the device to logically connect and discon-
nect from the USB while plugged in. A suspend mode is
provided for low-power operation. D+ and D- are pro-
tected from electrostatic discharge (ESD) up to ±15kV.
The MAX3349EA is available in 16-pin TQFN (4mm x
4mm) and 16-bump UCSP™ (2mm x 2mm) packages,
and is specified over the -40°C to +85°C extended tem-
perature range.
Applications
Cell Phones
PDAs
Digital Cameras
MP3 Players
Features
±15kV ESD HBM Protection on D+ and D-
UART Mode Routes External UART Signals to
D+/D-
Internal Linear Regulator Allows Direct Powering
from the USB Cable
Separate Voltage Input for UART
Transmitter/Receiver (VUART)
Internal 1.5kPullup Resistor on D+ Controlled
by Enumerate Input
Internal Series Termination Resistors on D+ and D-
Complies with USB Specification Revision 2.0,
Full-Speed 12Mbps Operation
Built-In Level Shifting Down to +1.4V, Ensuring
Compatibility with Low-Voltage ASICs
VBUS Detection
Combined VP and VM Inputs/Outputs
No Power-Supply Sequencing Required
Available in 16-Bump UCSP (2mm x 2mm)
Package
Ordering Information
PART
PIN-PACKAGE PKG CODE
MAX3349EAEBE+T
16 UCSP
B16-1
MAX3349EAETE**
16 TQFN-EP*
T1644-4
Note: All devices specified for the -40°C to +85°C extended
temperature range.
**Future product—contact factory for availability.
*EP = Exposed paddle.
+Indicates lead-free package.
Pin Configurations
TOP VIEW
12 11 10
9
TOP VIEW
1
+
23
MAX3349EA
4
ENUM 13
*EP
8 SUS A
VUART
RX
TX
BD
VTRM 14
VL 15
VM 16
+
MAX3349EA
1 23 4
7 OE
6 RCV
5 VP
TQFN-EP (4mm x 4mm)
*EXPOSED PADDLE—CONNECT TO GND OR LEAVE UNCONNECTED.
UCSP is a trademark of Maxim Integrated Products, Inc.
B VL VM VP RCV
C
VTRM
ENUM
SUS
OE
D
VBUS
D+
D- GND
UCSP (2mm x 2mm)
(BUMPS ON BOTTOM OF DIE)
+ DENOTES LEAD-FREE PACKAGE.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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MAX3349EA pdf
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USB 2.0 Full-Speed Transceiver with UART
Multiplexing Mode
TIMING CHARACTERISTICS (continued)
(VBUS = +4.0V to +5.5V, VUART = +2.7V to +3.3V, VL = +1.4V to +2.75V, TA = -40°C to +85°C, unless otherwise noted. Typical values
are at VBUS = +5V, VL = +1.8V, VUART = +2.75V (UART Mode), and TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Single-Ended Receiver Disable
Delay
tPHZ_SE
tPLZ_SE
High-to-off transition,
VL > +1.65V (Figure 5)
High-to-off transition,
+1.4V < VL < +1.65V (Figure 5)
Low-to-off transition,
VL > +1.65V (Figure 5)
Low-to-off transition,
+1.4V < VL < +1.65V (Figure 5)
10
12
ns
10
12
Single-Ended Receiver Enable
Delay
tPZH_SE
tPZL_SE
Off-to-high transition,
VL > +1.65V (Figure 5)
Off-to-high transition,
+1.4V < VL < +1.65 (Figure 5)
Off-to-low transition,
VL > +1.65V (Figure 5)
Off-to-low transition,
+1.4V < VL < +1.65V (Figure 5)
UART DRIVER CHARACTERISTICS (CL = 200pF)
Rise Time (D-)
tFR_TUART 10% to 90% of |VOHD - VOLD| (Figure 13)
Fall Time (D-)
tFF_TUART 90% to 10% of |VOHD - VOLD| (Figure 13)
Driver Propagation Delay
tPLH_TUART (Figure 13)
tPHL_TUART (Figure 13)
UART RECEIVER CHARACTERISTICS (CL = 15pF)
Receiver (Rx) Propagation Delay
tPLH_RUART (Figure 14)
tPHL_RUART (Figure 14)
Receiver (Rx) Rise/Fall Time
tFR_RUART
tFF_RUART
(Figure 14)
(Figure 14)
20
20
ns
20
20
60 200
60 200
70 200
70 200
60
60
45
45
ns
ns
ns
ns
ns
Note 1: Parameters are 100% production tested at TA =+25°C, unless otherwise noted. Limits over temperature are guaranteed
by design.
Note 2: Guaranteed by design, not production tested.
_______________________________________________________________________________________ 5

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USB 2.0 Full-Speed Transceiver with UART
Multiplexing Mode
Table 1. Power-Supply Configuration
VBUS(V)
+4.0 to +5.5
+4.0 to +5.5
GND or Unconnected
VTRM(V)
+3.0 to +3.6 Output
+3.0 to +3.6 Output
High Impedance
VL(V)
+1.4 to +2.75
GND or Unconnected
+1.4 to +2.75
VUART(V)
GND, Unconnected, or
+2.7V to +3.3V
GND, Unconnected, or
+2.7V to +3.3V
+2.7V to +3.3V
CONFIGURATION
USB Mode
Disable Mode
UART Mode
Table 2. USB Transmit Truth Table (OE = 0)
INPUTS
VP VM
00
01
10
11
D+
0
0
1
1
OUTPUTS
D-
0
1
0
1
Table 3a. USB Receive Truth Table (OE = 1,
SUS = 0)
INPUTS
D+ D-
00
01
10
11
OUTPUTS
VP VM RCV
0 0 RCV*
010
101
11X
* = Last state.
X = Undefined.
USB Mode
The MAX3349EA is in USB mode when VBUS is greater
than VTH-BUS and the bus detect output (BD) is logic-
high. In USB mode, power for the MAX3349EA is
derived from VBUS, typically provided through the USB
connector. An internal linear regulator generates the
required +3.3V VTRM voltage from VBUS. VTRM powers
the internal USB transceiver circuitry and the D+ enu-
meration resistor. Bypass VTRM to GND with a 1µF
ceramic capacitor as close to the device as possible.
Do not power external circuitry from VTRM.
Disable Mode
Connect VBUS to a system power supply and leave VL
unconnected or connect to ground to enter disable
mode. In disable mode, D+ and D- are high imped-
ance, and withstand external signals up to +5.5V. OE,
SUS, and control signals are ignored.
Table 3b. USB Receive Truth Table (OE = 1,
SUS = 1)
INPUTS
D+ D-
00
01
10
11
OUTPUTS
VP VM RCV
000
010
100
110
UART Mode
Connect VL and VUART to system power supplies, and
leave VBUS unconnected or below VTH-BUS to operate
the MAX3349EA in UART mode. The MAX3349EA sup-
ports VUART from +2.7V to +3.3V (see Table 1).
USB Control Signals
OE
OE controls the direction of communication for USB
mode. When OE is logic-low, VP and VM operate as
logic inputs, and D+/D- are outputs. When OE is logic-
high, VP and VM operate as logic outputs, and D+/D-
are inputs. RCV is the output of the differential USB
receiver connected to D+/D-, and is not affected by the
OE logic level.
ENUM
Drive ENUM logic-high to enable the internal 1.5k
pullup resistor from D+ to VTRM. Drive ENUM logic-low
to disable the internal pullup resistor and logically dis-
connect the MAX3349EA from the USB.
SUS
Operate the MAX3349EA in low-power USB suspend
mode by driving SUS logic-high. In suspend mode, the
USB differential receiver is turned off and VBUS con-
sumes 38µA (typ) of supply current. The single-ended
VP and VM receivers remain active to detect a SE0
state on USB bus lines D+ and D-. The USB transmitter
remains enabled in suspend mode to allow transmis-
sion of a remote wake-up on D+ and D-.
______________________________________________________________________________________ 11

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