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PDF PLUS173-10 Data sheet ( Hoja de datos )
| Número de pieza | PLUS173-10 | |
| Descripción | Programmable logic array | |
| Fabricantes | NXP Semiconductors | |
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Philips Semiconductors Programmable Logic Devices
Programmable logic array
(22 × 42 × 10)
Product specification
PLUS173–10
DESCRIPTION
The PLUS173–10 PLD is a high speed,
combinatorial Programmable Logic Array.
The Philips Semiconductors state-of-the-art
Oxide Isolated Bipolar fabrication process is
employed to produce maximum propagation
delays of 10ns or less.
The 24-pin PLUS173–10 device has a
programmable AND array and a
programmable OR array. Unlike PAL®
devices, 100% product term sharing is
supported. Any of the 32 logic product terms
can be connected to any or all of the 10
output OR gates. Most PAL ICs are limited to
7 AND terms per OR function; the
PLUS173–10 device can support up to 32
input wide OR functions.
The polarity of each output is user-
programmable as either Active-High or
Active-Low, thus allowing AND-OR or
AND-NOR logic implementation. This feature
adds an element of design flexibility,
particularly when implementing complex
decoding functions.
The PLUS173–10 device is user-
programmable using one of several
commercially available, industry standard
PLD programmers.
FEATURES
• I/O propagation delays
– 10ns (worst case)
• Functional superset of 20L10 and most
other 24-pin combinatorial PAL devices
• Two programmable arrays
– Supports 32 input wide OR functions
• 12 inputs
• 10 bi-directional I/O
• 42 AND gates
– 32 logic product terms
– 10 direction control terms
• Programmable output polarity
– Active-High or Active-Low
• Security fuse
• 3-State outputs
• Power dissipation: 850mW (typ.)
• TTL Compatible
APPLICATIONS
• Random logic
• Code converters
• Fault detectors
• Function generators
• Address mapping
• Multiplexing
PIN CONFIGURATIONS
N Package
I0 1
I1 2
I2 3
I3 4
I4 5
I5 6
I6 7
I7 8
I8 9
I9 10
I10 11
GND 12
24 VCC
23 B9
22 B8
21 B7
20 B6
19 B5
18 B4
17 B3
16 B2
15 B1
14 B0
13 I11
N = Plastic Dual In-Line (300mil-wide)
A Package
I3 I2 I1 I0 VCC B9 B8
4 3 2 1 28 27 26
NC 5
25 NC
I4 6
24 B7
I5 7
23 B6
I6 8
22 B5
I7 9
21 B4
I8 10
20 B3
NC 11
19 NC
12 13 14 15 16 17 18
I9 I10 GND I11 B0 B1 B2
A = Plastic Leaded Chip Carrier
ORDERING INFORMATION
DESCRIPTION
24-Pin Plastic Dual In-Line 300mil-wide
28-Pin Plastic Leaded Chip Carrier
tPD (MAX)
10ns
10ns
ORDER CODE
PLUS173–10N
PLUS173–10A
DRAWING NUMBER
0410D
0401F
®PAL is a registered trademark of Advanced Micro Devices Corporation.
October 22, 1993
41
853–1422 11164
1 page  
Philips Semiconductors Programmable Logic Devices
Programmable logic array
(22 × 42 × 10)
Product specification
PLUS173–10
AC ELECTRICAL CHARACTERISTICS
0°C ≤ Tamb ≤ +75°C, 4.75 ≤ VCC ≤ 5.25V, R1 = 300Ω, R2 = 390Ω
TEST
LIMITS
SYMBOL
PARAMETER
FROM
TO
CONDITION
MIN TYP MAX
UNIT
tPD Propagation Delay2
Input +/–
Output +/–
CL = 30pF
8 10
ns
tOE Output Enable1
Input +/–
Output –
CL = 30pF
8 10
ns
tOD Output Disable1
Input +/–
Output +
CL = 5pF
8 10
ns
NOTES:
1. For 3-State outputs; output enable times are tested with CL = 30pF to the 1.5V level, and S1 is open for high-impedance to High tests and
closed for high-impedance to Low tests. Output disable times are tested with CL = 5pF. High-to-High impedance tests are made to an output
voltage of VT = (VOH – 0.5V) with S1 open, and Low-to-High impedance tests are made to the VT = (VOL + 0.5V) level with S1 closed.
2. All propagation delays are measured and specified under worst case conditions.
VOLTAGE WAVEFORM
+3.0V
90%
TEST LOAD CIRCUIT
VCC +5V S1
0V
+3.0V
10%
5ns
tR tF
5ns
90%
0V
5ns
10%
5ns
MEASUREMENTS:
All circuit delays are measured at the +1.5V level
of inputs and outputs, unless otherwise specified.
Input Pulses
C1 C2
In BZ
INPUTS
In DUT
BM
R1
R2 CL
BM GND BZ
OUTPUTS
NOTE:
C1 and C2 are to bypass VCC to GND.
Test Load Circuit
TIMING DEFINITIONS
SYMBOL
PARAMETER
tPD Propagation delay between
input and output.
tOD Delay between input change
and when output is off (Hi-Z
or High).
tOE Delay between input change
and when output reflects
specified output level.
TIMING DIAGRAM
I, B 1.5V
B 1.5V
tPD
1.5V
1.5V
+3V
0V
VOH
VT 1.5V
VOL
tOD tOE
October 22, 1993
45
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PLUS173-10.PDF ] | |
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