PDF MB91247 Data sheet ( Hoja de datos )

Número de pieza	MB91247
Descripción	(MB91245 Series) 32-bit Microcontroller
Fabricantes	Fujitsu Media Devices
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No Preview Available ! www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16803-1E 32-bit Microcontroller CMOS FR60Lite MB91245/S Series MB91247/247S/248/248S/F248/F248S/MB91V245A ■ OVERVIEW MB91245/S series is Fujitsu’s general-purpose 32-bit RISC microcontroller, which is designed for embedded control applications that require high-speed real-time processing of consumer appliances. This microcontroller uses FR60Lite as its CPU, compatible with other products in the FR* family. This series incorporates an LCD controller and stepping motor controller. * : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited. ■ FEATURES • FR60Lite CPU • 32-bit RISC, load/store architecture, 5-stage pipeline • Maximum operating frequency : 32 MHz (Source oscillation is 4 MHz with x8 multiplier – PLL clock multiplier system) • 16-bit fixed-length instructions (basic instructions) • Instruction execution speed : 1 instruction per cycle • Instruction set optimized for embedded application : Memory-to-memory transfer, bit manipulation, barrel shift instructions etc. • Instructions adapted for programming C language : Function entry/exit instructions, multiple-register load/store instructions. • Register interlock function : Easier assembler coding enabled • Built-in multiplier supported at the instruction level Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplication : 3 cycles (Continued) Be sure to refer to the “Check Sheet” for the latest cautions on development. “Check Sheet” is seen at the following support page URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html “Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system development. Copyright©2006 FUJITSU LIMITED All rights reserved 1 page MB91245/S Series ■ PIN DESCRIPTIONS Pin no. 1 to 4 5 to 12 13 to 15 16 17 18 19 20 21 to 25 26 to 31 32 33 34 35 Pin name I/O circuit type* Function P24 to P27 General purpose I/O port pins SEG04 to SEG07 F SEG output pin for LCDC A04 to A07 Bits 04 to 07 pins of external address bus P30 to P37 General purpose I/O port pins SEG08 to SEG15 F SEG output pins for LCDC A08 to A15 Bits 08 to 15 pins of external address bus P10 to P12 General purpose I/O port pins SEG16 to SEG18 G SEG output pins for LCDC D08 to D10 Bits 08 to 10 pins of external data bus X0A B Sub clock (oscillation) input X1A B Sub clock (oscillation) output VCC VSS VCC3C P13 to P17 ⎯ Power supply pins ⎯ GND pins ⎯ Capacitor connection pin for internal regulator General purpose I/O port pins SEG19 to SEG23 G SEG output pins for LCDC D11 to D15 Bits 11 to 15 pins of external data bus P00 to P05 General purpose I/O port pins SEG24 to SEG29 SEG output pins for LCDC G INT0 to INT5 External interrupt input pins D00 to D05 Bits 00 to 05 pins of external data bus P06 General purpose I/O port pin SEG30 G SEG output pins for LCDC D06 Bit 06 pin of external data bus P07 General purpose I/O port pin SEG31 ATG SEG output pin for LCDC G External trigger input pin at using of A/D converter D07 Bit 07 pin of external data bus P70 General purpose I/O port pin INT6 I External interrupt input pin RX0 RX0 input pin of CAN0 P71 General purpose I/O port pin I TX0 TX0 output pin of CAN0 (Continued) 5 5 Page MB91245/S Series (Continued) Pin no. Pin name I/O circuit type* Function PD0 General-purpose I/O port pin TIN0 Event input pin for reload timer Trigger input pin of input capture 0 : This sets input capture to trigger input and is enabled when input port is set up. When set 133 IN0 K as input capture input, it requires output by ports to be stopped, except when executed intentionally, as this input is always used. PWC0 Input pin of pulse width counter 0 of PWC0 : Valid when input of pulse width counter 0 of PWC0 is permitted PD1 General-purpose I/O port pin TIN1 Event input pin for reload timer Trigger input pin of input capture 1 : This sets input capture to 134 K trigger input and is enabled when input port is set up. When set IN1 as input capture input, it requires output by ports to be stopped, except when executed intentionally, as this input is always used. PD2 General-purpose I/O port pin TIN2 Event input pin for reload timer Trigger input pin of input capture 2 : This sets input capture to 135 K trigger input and is enabled when input port is set up. When set IN2 as input capture input, it requires output by ports to be stopped, except when executed intentionally, as this input is always used. PD3 General-purpose I/O port pin Trigger input pin of input capture 3 : This sets input capture to 136 K trigger input and is enabled when input port is set up. When set IN3 as input capture input, it requires output by ports to be stopped, except when executed intentionally, as this input is always used. PD4 to PD7 General-purpose I/O port pin 137 to 140 COM0 to COM3 PPG1, PPG3, PPG5, PPG7 F Output pin of COM0 to COM3 of LCDC Output pin of PPG timer 1, 3, 5 and 7 : Valid when output of PPG timer 1, 3, 5 and 7 is permitted P20 to P23 General purpose I/O port pins 141 to 144 SEG00 to SEG03 F SEG output pins for LCDC A00 to A03 Bits 00 to 03 pins of external address bus * : For information about the I/O circuit type, refer to “■ I/O CIRCUIT TYPE”. 11 11 Page

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