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PDF CS43L43 Data sheet ( Hoja de datos )
| Número de pieza | CS43L43 | |
| Descripción | Stereo DAC | |
| Fabricantes | Cirrus Logic | |
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CS43L43
Low Voltage, Stereo DAC with Headphone Amp
Features
16-Pin TSSOP Package
1.8 to 3.3 Volt Supply
24-Bit Conversion / 96 kHz Sample Rate
94 dB Dynamic Range at 3 V Supply
-85 dB THD+N at 1.8 V Supply
Low Power Consumption
Digital Volume Control
• 96 dB Attenuation, 1 dB Step Size
Digital Bass and Treble Boost
• Selectable Corner Frequencies
• Up to 12 dB Boost in 1 dB Increments
Peak Signal Limiting to Prevent Clipping
De-emphasis for 32 kHz, 44.1 kHz, and
48 kHz
Headphone Amplifier
• up to 22 mWrms Power Output into 16 Ω Load*
• 25 dB Analog Attenuation and Mute
• Zero Crossing Click-free Level Transitions
ATAPI Mixing Functions
* 1 kHz sine wave at 3.3V supply
Description
The CS43L43 is a complete stereo digital-to-analog out-
put system including interpolation, 1-bit D/A conversion,
analog filtering, volume control, and a headphone ampli-
fier, in a 16-pin TSSOP package.
The CS43L43 is based on delta-sigma modulation,
where the modulator output controls the reference volt-
age input to an ultra-linear analog low-pass filter. This
architecture allows infinite adjustment of the sample rate
between 2 kHz and 100 kHz simply by changing the
master clock frequency.
The CS43L43 contains on-chip digital bass and treble
boost, peak signal limiting and de-emphasis. The
CS43L43 operates from a +1.8 V to +3.3 V supply and
consumes only 16 mW of power with a 1.8 V supply.
These features are ideal for portable CD, MP3 and MD
players and other portable playback systems that require
extremely low power consumption.
ORDERING INFORMATION
CS43L43-KZ
-10 to 70 °C 16-pin TSSOP
CS43L43-KZZ, Lead Free -10 to 70 °C 16-pin TSSOP
CDB43L43
Evaluation Board
RST
DIF1/SDA
DIF0/SCL
CONTROL PORT INTERFACE
LRCK
SCLK/DEM
SDATA
SERIAL
AUDIO
INTERFACE
DE-
EMPHASIS
DIGITAL
VOLUME
CONTROL
BASS/TREBLE
BOOST
LIMITING
DIGITAL
FILTER
∆Σ
DAC
∆Σ
DAC
ANALOG
FILTER
ANALOG
VOLUME
CONTROL
ANALOG
FILTER
ANALOG
VOLUME
CONTROL
HEAD-
PHONE
AMPLIFIER
HP_A
HP_B
MCLK
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2004
(All Rights Reserved)
JUL ‘04
DS479PP3
1 page  
2.0 TYPICAL CONNECTION DIAGRAM
CS43L43
1.8 to 3.3 V
Supply
1.8 to 3.3 V
Supply
*Ferrite
bead
+
*1.0 µF
0.1 µF
0.1 µF
*Ferrite
bead
+
*1.0 µF
4
0.1 µF
Serial Audio
Data
Processor
5
1
3
2
12
VA
VL
13
VA_HP
HP_A
10
220 µF
+
1 kΩ
CS43L43
MCLK
LRCK
SCLK/DEM
SDATA
HP_B 14 220 µF
+
1 kΩ
VQ_HP 7
*Ferrite
bead
+
*1.0 µF
47 µH
47 µH
0.9 to 3.3 V
Supply
16 Ω
Headphones
µc/ 16 RST
Mode
Configuration
6
15
DIF0/SCL
DIF1/SDA
FILT+ 9
REF_GND 8
++
1.0 µF 1.0 µF
* Optional
GND
11
Figure 1. Typical Connection Diagram
DS479PP3
5
5 Page 
CS43L43
3.6.4 Auxilliary Mute Control
For critical applications, the Popguard® Transient Control may not be sufficient in eliminating extra-
neous audible artifacts on the headphone outputs during power-up. For these applications, an option-
al external mute can be used to maintain an absolute minimum of extraneous clicks and pops. Please
see Figures 6 and 7 for the suggested headphone mute circuit.
The Mute Control will need to be generated externally from a DSP or Microcontroller. See Figure 7
for /RST and Mute Control timing.
From CS43L43 Pin 1 0 (HP_A)
2 2 0uF
The M otorola M OSFETs shown have been
tested to work properly, however, an
equivalent device m ay be used.
47u H
M G S F1N H 02E LT
Headphones
1k 16
From CS43L43 Pin 1 4 (HP_B)
2 2 0uF
47u H
1k
M G S F1N H 02E LT
16
Mute Control from uC or DSP
100K
Figure 6. Optional Headphone Mute Circuit
Headphone Output at
pin of part
DS479PP3
~ 300 m sec
/R S T
~ 900 m sec
Mute Control from
DSP or
M ic ro C o n tro lle r
Figure 7. Timing for Headphone Mute
11
11 Page | ||
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| PDF Descargar | [ Datasheet CS43L43.PDF ] | |
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