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PDF CRD42528 Data sheet ( Hoja de datos )
| Número de pieza | CRD42528 | |
| Descripción | Reference Design | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CRD42528
Reference Design for the CS49300 and CS42528
Features
Supports 4 digital S/PDIF
(IEC60958/IEC61937) inputs
8 Discrete analog inputs using the CS42528
+ 3 external CS5351 ADCs for 8 analog
channels of input at 48 kHz and 96 kHz
2 Channel upsampling supported
8 Discrete analog outputs from the CS42528
2 Digital S/PDIF (IEC60958/IEC61937)
outputs using the CS42528 Mux and
XMT958 transmitter on the CS49300
On board SRAM for AAC 5.1 discrete
channel decoding
In system programmable Flash, capable of
holding 16 DSP programs
Description
The CRD42528 is a reference design for the CS49300
DSP family and the CS42528 CODEC. It supports up to
8 channels of analog input at 48 and 96 kHz, or
2 channels of analog input at 192 kHz. One of four
digital S/PDIF inputs may be selected. Additionally, up
to 2 channels of digital S/PDIF output and 8 channels of
analog output at up to 192 kHz are supported. The on
board SRAM is included to allow for AAC 5.1 discrete
channel decoding, and on-board flash memory is
included to allow in-system programming of up to
16 DSP images. The DSP supports the following
algorithms, including (but not limited to) AAC, Dolby
Digital (AC-3), Dolby Digital EX, DTS, DTS-ES, DTS
Neo:6, Cirrus Original Surround (including COS 6.1),
SRS CircleSurround, SRS TruSurround, Pro Logic II,
MPEG Multichannel (including EX), and HDCD.
The control interface to the CRD42528 is the UDSP
System Platform. All control and data I/O is connected
to headers, which allows the CRD42528 to be used
easily in a end system or as a reference design. A larger
block diagram is shown on the next page.
ORDERING INFORMATION
CRD42528
Reference Design
4x
SPDIF
L
R
8x
ANALOG
Ls
Rs
C
Sub
CS5351
SDOUT
AIN
CS5351
SDOUT
AIN
SBL
SBR
RXP0
RXP1
RXP2
RXP3
AIN
SAI
Ext ADC
In
CS5351
SDOUT
AIN
CS42528
CS493XX-IBA
(or CS492XX)
CDI
AUDATA0
AUDATA1
AUDATA2
AUDATA3
DAI
EMAD
External
SRAM/Flash
AOUT1
AOUT2
AOUT3
AOUT4
CX_SDIN1
CX_SDIN2
AOUT5
AOUT6
CX_SDIN3
CX_SDIN4
AOUT7
AOUT8
L
R
Ls
Rs
C
Sub
SBL / Lt
SBR / Rt
IEC60958
Preliminary Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
MAY’ 03
DS586RD2
1
1 page  
1. QUICK START
A PC with an ECP parallel port, a stereo analog
audio source, and powered speakers are required to
use the CRD42528 in the mode specified in this
Quick Start.
1) Install the drivers supplied with the board on
the PC. Refer to “UDSP Schematics” on
page 37 for details on installing the drivers.
2) Connect the supplied parallel port cable to J46
on the UDSP MainBoard (marked P PORT)
and to the computer’s ECP parallel port.
3) Connect the analog output from an audio
source to AIO7-8 (Left and Right Inputs) The
input channels are mapped as follows:
- AIO8 - Left
- AIO7 - Right
- AIO6 - Left Surround
- AIO5 - Right Surround
- AIO4 - Center
- AIO3 - Subwoofer / Low Frequency Effects
(LFE)
- AIO2 - Surround Back Left
- AIO1 - Surround Back Right
4) Connect powered speakers to AIO15-16. The
output channels are mapped as follows (more
speakers can be connected to the line level
outputs as required by each application):
- AIO16 - Left
- AIO15 - Right
- AIO14 - Left Surround
- AIO13 - Right Surround
- AIO12 - Center
- AIO11 - Subwoofer or Low Frequency Ef-
fects (LFE)
- AIO10 - Surround Back Left or Lt
- AIO9 - Surround Back Right or Rt
5) Connect the supplied power supply to the
power connector on the board and to an
appropriate power outlet.
6) Verify that LEDs D1, D7, D9, and D11 on the
UDSP board are lit. LED D2 will flash to
indicate that the PLD on the UDSP is
functional.
7) Open a DOS window and navigate to the
C:\CS49300\CRD42528\Configs directory.
8) Type in “setpld -r 99” on the DOS prompt.
(This reads the PLD version register and
verifies that the PC can communicate with the
board). If the driver generates the error message
“!!! Board does not appear to be connected !!!”,
then your parallel port address may not be
0x378 or your port is not ECP capable. If your
parallel port address is not 0x378, depress the
reset switch S3 and type in “setpld -r 99 -p3bc”
or “setpld -r 99 -p278” to communicate using a
different parallel port address.
9) Verify that LED D1 (marked ERR) has turned
OFF, indicating that the driver has successfully
communicated with the board.
10) If the above steps give an error, refer to “UDSP
Schematics” on page 37 and verify that the
drivers and PC have been set up as described
(and that the parallel port address is correct / set
to ECP mode).
11) If the above steps give the expected results, ty p e
in “analog_in_96kH z”, “analog_in_96kHz -
p 3b c”, o r “analog_in_96kHz -p278”
(depending on your parallel port address) at the
DOS prompt. This batch file will configure the
PLD, boot the DSP, and configure the CS42528
for 8 channel analog processing at 96 kHz.
12) The audio data on the Left and Right Input
connectors (AIO7-8) should now be heard on
the output.
13) The batch files use various files to configure the
software, board, and the DSP code. Each batch
5
5 Page 
CS49300
CS42528
SAI Port
S/PDIF (IEC61937 / IEC60958)
RXP
CX Port
SAI Clocks(CS42528) / CDI Clocks(CS49300) at
128 Fs SCLK, LRCLK=Fs
2 Channels
or
Compressed
SAI Data(CS42528) / CDI Data(CS49300)
CX Clocks(CS42528) / DAI Clocks(CS49300) at
64 Fs SCLK, LRCLK=Fs
8 Channels
CX Data
CDI
DAO
AOUT
L / R / Ls / Rs / C / Sub / SBL / SBR Analog Out
Analog Input /
Output
Digital Data
Digital Serial Clocks
(SCLK and LRCLK)
Figure 5. Clock and Data Connections for S/PDIF (IEC61937 / IEC60958) Input
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CRD42528.PDF ] | |
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