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PDF ADA4922-1 Data sheet ( Hoja de datos )
| Número de pieza | ADA4922-1 | |
| Descripción | Differential 18-Bit ADC Driver | |
| Fabricantes | Analog Devices | |
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FEATURES
Single-ended-to-differential conversion
Low distortion (VO, dm = 40 V p-p)
−99 dBc HD at 100 kHz
Low differential output referred noise: 12 nV/√Hz
High input impedance: 11 MΩ
Fixed gain of 2
No external gain components required
Low output-referred offset voltage: 1.1 mV max
Low input bias current: 3.5 μA max
Wide supply range
5 V to 26 V
Can produce differential output signals in excess of 40 V p-p
High speed
38 MHz, −3 dB bandwidth @ 0.2 V p-p differential output
Fast settling time
200 ns to 0.01% for 12 V step on ±5 V supplies
Disable feature
Available in space-saving, thermally enhanced packages
3 mm × 3 mm LFCSP
8-lead SOIC_EP
Low supply current: IS = 10 mA on ±12 V supplies
APPLICATIONS
High voltage data acquisition systems
Industrial instrumentation
Spectrum analysis
ATE
Medical instruments
GENERAL DESCRIPTION
The ADA4922-1 is a differential driver for 16-bit to 18-bit
ADCs that have differential input ranges up to ±20 V.
Configured as an easy-to-use, single-ended-to-differential
amplifier, the ADA4922-1 requires no external components to
drive ADCs. The ADA4922-1 provides essential benefits such as
low distortion and high SNR that are required for driving ADCs
with resolutions up to 18 bits.
With a wide supply voltage range (5 V to 26 V), high input
impedance, and fixed differential gain of 2, the ADA4922-1 is
designed to drive ADCs found to in a variety of applications,
including industrial instrumentation.
High Voltage, Differential
18-Bit ADC Driver
ADA4922-1
FUNCTIONAL BLOCK DIAGRAM
NC 1
ADA4922-1
8 IN
REF 2
7 DIS
VS+ 3
6 VS–
OUT+ 4
5 OUT–
NC = NO CONNECT
Figure 1.
–84
–87 RL = 2kΩ
–90
SECOND HARMONIC
THIRD HARMONIC
–93
–96 VS = ±5V, VO, dm = 12V p-p
–99
–102
–105
–108
–111
–114
–117
VS = ±12V, VO, dm = 40V p-p
–120
1
10
FREQUENCY (kHz)
100
Figure 2. Harmonic Distortion for Various Power Supplies
The ADA4922-1 is manufactured on ADI’s proprietary second-
generation XFCB process that enables the amplifier to achieve
excellent noise and distortion performance on high supply
voltages.
The ADA4922-1 is available in an 8-lead 3 mm × 3 mm LFCSP
as well as an 8-lead SOIC package. Both packages are equipped
with an exposed paddle for more efficient heat transfer. The
ADA4922-1 is rated to work over the extended industrial
temperature range, −40°C to +85°C.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Storage Temperature Range
Operating Temperature Range
Lead Temperature Range (Soldering 10 sec)
Junction Temperature
Rating
26 V
See Figure 3
–65°C to +125°C
–40°C to +85°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for a device soldered in the circuit board with its
exposed paddle soldered to a pad on the PCB surface that is
thermally connected to a copper plane, with zero airflow.
Table 4. Thermal Resistance
Package Type
θJA θJC Unit
8-Lead SOIC with EP on 4-layer board 79 25 °C/W
8-Lead LFCSP with EP on 4-layer board 81 17 °C/W
Maximum Power Dissipation
The maximum safe power dissipation in the ADA4922-1
package is limited by the associated rise in junction temperature
(TJ) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4922-1. Exceeding a
junction temperature of 150°C for an extended period can
result in changes in the silicon devices potentially causing
failure.
ADA4922-1
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). The power dissipated due to the load
drive depends upon the particular application. For each output,
the power due to load drive is calculated by multiplying the load
current by the associated voltage drop across the device. The
power dissipated due to all of the loads is equal to the sum of
the power dissipation due to each individual load. RMS voltages
and currents must be used in these calculations.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA. The exposed paddle on the underside of the
package must be soldered to a pad on the PCB surface that is
thermally connected to a copper plane to achieve the specified θJA.
Figure 3 shows the maximum safe power dissipation in the
packages vs. the ambient temperature for the 8-lead SOIC
(79°C/W) and for the 8-lead LFCSP (81°C/W) on a JEDEC
standard 4-layer board, each with its underside paddle soldered
to a pad that is thermally connected to a PCB plane. θJA values
are approximations.
3.0
2.5
SOIC
2.0
LFCSP
1.5
1.0
0.5
0
–40 –20
0
20 40 60
AMBIENT TEMPERATURE (°C)
80
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 20
5 Page 
8 4.8
6 VOUT, dm 3.6
4 VIN
2
2.4
1.2
0
ERROR
–2
0
–1.2
–4 –2.4
1μs/DIV
–6
VS = ±5V
–3.6
VO, dm = 12V p-p
–8 –4.8
Figure 28. Settling Time, VS = ±5 V
12
INPUT × 2
8
4
0
–4
–8
OUTPUT
–12
1μs/DIV
Figure 29. Input Overdrive Recovery, VS = ±5 V
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
–40
–20
VS = ±5V
VS = ±12V
0 20 40
TEMPERATURE (°C)
60
80
Figure 30. Differential Output Offset Voltage vs. Temperature
ADA4922-1
28 16
21 VOUT, dm 12
14 VIN
7
8
4
0
ERROR
–7
0
–4
–14 –8
1μs/DIV
–21
VS = ±12V
–12
VO, dm = 40V p-p
–28 –16
Figure 31. Settling Time, VS = ±12 V
26
INPUT × 2
22
18
14
10
6
2
–2
–6
–10
–14 OUTPUT
–18
–22
–26
1μs/DIV
Figure 32. Input Overdrive Recovery, VS = ±12 V
50
VS = ±5V
45 MEAN = 0.25mV
STD. DEV. = 0.19mV
40
VS = ±12V
35 MEAN = –0.07mV
STD. DEV. = 0.17mV
30 NUMBER OF
UNITS = 590
25
20
15
10
5
0
DIFFERENTIAL OUTPUT OFFSET VOLTAGE (mV)
Figure 33. Differential Output Offset Voltage Distribution
Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADA4922-1.PDF ] | |
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