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PDF PI49FCT806T Data sheet ( Hoja de datos )

Número de pieza PI49FCT806T
Descripción (PI49FCTx80xT) Fast CMOS Buffer/Clock Driver
Fabricantes Pericom Semiconductor 
Logotipo Pericom Semiconductor Logotipo



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PI49FCT805T
PI49FCT2805T
PI49FCT806T1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
Fast CMOS
Buffer/Clock Driver
Product Features
• Extremely low output skew: 0.5ns
• Monitor output pin
• Clock busing with Hi-Z state control
• TTL input and CMOS output compatible
• Extremely low static power (1mW, typ.)
• Hysteresis on all inputs
• Packages available:
– 20-pin 209 mil wide SSOP (H)
– 20-pin 300 mil wide SOIC (S)
– 20-pin 150 mil wide QSOP (Q)
• Device models available on request
• Industrial Operation at -40ºC to +85ºC
Product Description
Pericom Semiconductor’s PI49FCT series of logic circuits are
produced using the Company’s advanced 0.8 micron CMOS
technology, achieving industry leading speed grades.
The PI49FCT805T and PI49FCT2805T are non-inverting clock
drivers. The PI49FCT806T is an inverting clock driver designed with
two independent groups of buffers that have Hi-Z state Output
Enable inputs (active LOW) with a 1-in, 5-out configuration per
group. Each clock driver consists of two banks of drivers, driving
five outputs each from a standard TTL-compatible CMOS input.
The PI49FCT2805T also features a 25-ohm on-chip resistor for lower
noise.
PI49FCT805T/2805T Logic Block Diagram
OEA
5
INA OA0–4
5
INB OB0–4
OEB
MON
PI49FCT806T Logic Block Diagram
OEA
INA
5
OA0–4
INB
OEB
5
OB0–4
MON
1 PS7006C 06/27/01

1 page




PI49FCT806T pdf
PI49FCT805T
PI49FCT2805T/PI49FCT806T
11223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211F2233a4455s66t77C889900M112233O4455S6677B8899u0011f22f33e4455r66/77C8899l00o1122c11k2233D4455r6677i88v99e0011r22
PI49FCT805/806T Switching Characteristics over Operating Range
805T/2805T/ 805AT/2805AT/ 805BT/2805BT/ 805CT/2805CT/
806T
806AT
806BT
806CT
Parameters
Description
tPLH
tPHL
Propagation Delay
INA to OAN,
INB to OBN
tPZH
tPZL
tPHZ
tPLZ
tSKEW(o)(3)
Output Enable Time
OEA to OAN,
OEB to OBN
Output Disable Time(4)
OEA to OAN,
OEB to OBN
Skew twx two outputs
of same package
(same transition)
tSKEW(p)(3) Skew twx opposite
transitions (tPHL-tPLH)
of same output
tSKEW(t)(3)
Skew twx two outputs
of different package at
same temperature
(same transition)
Conditions(1)
CL = 50pF
RL = 500
Com.
Min. Max.
1.5 6.5
1.5 8.0
1.5 7.0
— 0.7
— 1.0
— 1.5
Com
Min. Max.
1.5 5.8
1.5 8.0
1.5 7.0
— 0.5
— 0.7
— 1.0
Com.
Min. Max.
1.5 5.0
1.5 8.5
1.5 6.0
— 0.4
— 0.5
— 1.0
Com
Min. Max. Units
1.5 4.5
1.5 6.2
1.5 5.0
ns
— 0.4
— 0.5
— 1.0
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
4. This parameter is guaranteed but not production tested.
Tests Circuits For All Outputs(1)
VCC
Pulse
Generator
VIN
VOUT
D.U.T.
500
50pF
RT CL 500
7.0V
Switch Position
Test
Open Drain
Disable LOW
Enable LOW
All Other Inputs
Switch
Closed
Open
Definitions:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the
Pulse Generator.
5 PS7006C 06/27/01

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