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PDF HY64LD16162M Data sheet ( Hoja de datos )
| Número de pieza | HY64LD16162M | |
| Descripción | 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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HY64LD16162M Series
Document Title
1M x 16 bit Low Low Power 1T/1C Pseudo SRAM
Revision history
Revision No.
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
History
Initial
Revised
- Change Pin Connection
- Improve tOE from 45ns to 30ns
- Correct State Diagram
Revised
- Correct Package Dimension
- Change Absolute Maximum Ratings
Revised
- DC Electrical Characteristics ( IDPD,ICC1)
- State Diagram
- Power Up Sequence
- Deep Power Down Sequence
- Read/Write Cycle Note
Revised
- DC Electrical Characteristics ( ICC1: 3mA - > 5mA)
Revised
- Improve Standby Current ISB1 from 100uA to 80uA
- Power Up Sequence
Revised
- Improve ISB1 80uA to 75uA
- Improve ICC2 30mA to 20mA
- Improve Ambient Temperature C/E to E/I
(0°C~85°C/-25°C~85°C → -25°C~85°C/-40°C~85°C)
- Improve Maximum Absolute Ratings
(Vdd : -0.3V to 3.3V → -0.3V to 3.6V)
- Improve tOE 30ns to 20ns
Revised
- Pin Description
- Power Up & Deep Power Down Exit Sequence
Draft Date
Jan. 04. ’ 01
Jul. 03. ’ 01
Jul.18. ’ 01
Oct. 07. ‘ 01
Nov. 14. ’ 01
Dec. 20. ‘ 01
Feb. 27. ‘ 02
Mar. 11. ‘ 02
Remark
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Final
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not
assume any responsibility for use of circuits described. No patent licenses are implied.
Revision 1.7
March. 2002
1
1 page  
HY64LD16162M Series
AC CHARACTERISTICS
Vdd=2.3V~2.7V, TA = -25°C to 85°C(E) / -40°C to 85°C(I), unless otherwise specified
# Symbol
Parameter
-85
Min.
Max.
Read Cycle
1 tRC Read Cycle Time
85 -
2 tAA Address Access Time
- 85
3 tACS Chip Select Access Time
- 85
4 tOE Output Enable to Output Valid
- 20
5 tBA /LB, /UB Access Time
- 85
6 tCLZ Chip Select to Output in Low Z
10 -
7 tOLZ Output Enable to Output in Low Z
5-
8 tBLZ /LB, /UB Enable to Output in Low Z
10 -
9 tCHZ Chip Disable to Output in High Z
0 30
10 tOHZ Out Disable to Output in High Z
0 30
11 tBHZ /LB, /UB Disable to Output in High Z
0 30
12 tOH Output Hold from Address Change
10 -
Write Cycle
13 tWC Write Cycle Time
85 -
14 tCW Chip Selection to End of Write
70 -
15 tAW Address Valid to End of Write
70 -
16 tBW /LB, /UB Valid to End of Write
70 -
17 tAS Address Set-up Time
0-
18 tWP Write Pulse Width
60 -
19 tWR Write Recovery Time
0-
20 tWHZ Write to Output in High Z
0 30
21 tDW Data to Write Time Overlap
30 -
22 tDH Data Hold from Write Time
0-
23 tOW Output Active from End of Write
5-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CONDITIONS
TA = -25°C to 85°C(E) / -40°C to 85°C(I), unless otherwise specified
Parameter
Value
Input Pulse Level
0.4V to 2.2V
Input Rising and Fall Time
5ns
Input and Output Timing Reference Level
1.1V
Output Load
See Below
AC TEST LOADS
DOUT
Z0=50 Ohm
RL=50 Ohm
CL1 =30 pF
VL=1.1 V
Note
1. Including jig and scope capacitance.
Revision 1.7
March. 2002
5
5 Page 
MARKING INFORMATION
Package
HY64LD16162M Series
Marking Example
FBGA
H Y L D 1 6 1 6 2M
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KOR
• HYLD16162M
HY
L
D
16
16
2
M
•c
• ss
•t
• yy
• ww
•p
• xxxxx
• KOR
Note
- Capital Letter
- Small Letter
Index
: Part Name
: HYNIX
: Power Supply
: Tech. + Classification
: Bit Organization
: Density
: Mode
: Version
: 2.5V(2.3V~2.7V)
: 1T+1C
: x16
: 16M
: 1CS with /UB,/LB;tCS
: 1st Generation
: Power Consumption
: Speed
: Temperature
: D – Low Low Power
: 85 – 85ns
: E – Extended(-25 ~ 85°C)
I – Industrial(-40 ~ 85°C)
: Year (ex : 01 = year 2001, 02= year 2002)
: Work Week ( ex : 12 = work week 12 )
: Process Code
: Lot No.
: Origin Country
: Fixed Item
: Non-fixed Item
Revision 1.7
March. 2002
11
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet HY64LD16162M.PDF ] | |
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