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PDF HY62UF16804A Data sheet ( Hoja de datos )
| Número de pieza | HY62UF16804A | |
| Descripción | 512Kx16bit full CMOS SRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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HY62UF16804A Series
512Kx16bit full CMOS SRAM
Document Title
512K x16 bit 3.0V Super Low Power Full CMOS slow SRAM
Revision History
Revision No History
04 Initial Revision History Insert
Revised
- Reliability Spec Deleted
Draft Date
Jul.02.2000
Remark
Preliminary
05 Change AC Characteristics
- tBLZ : 5/5/5 ---> 10/10/10
Oct.23.2000 Preliminary
06 Part Number is changed
- HY62UF16803A --> HY62UF16804A
Nov.13.2000 Preliminary
07 Marking Instruction is inserted
Dec.5.2000 Preliminary
08 Test Condition Changed
- ILO / ISB / ISB1 / VDR / ICCDR
Marking Istruction Inserted
Dec.16.2000 Preliminary
09 Change Logo
- Hyundai à Hynix
Apr.28.2001
10 Change DC Parameter
Jan.28.2002
- Isb1(LL) : 40uA à 25uA
- Isb1(Typ) : 8uA à 1uA
- Icc : 5mA à 4mA
- Icc1(1us) : 8mA à 4mA
- Icc1(Min) : 50mA à 40mA
Change Data Retention
- IccDR(LL) : 25uA à 15uA
Change AC Parameter
- tOE
: 35ns à 25ns@55ns
: 40ns à 35ns@70ns
- tCW
: 50ns à 45ns@55ns
- tAW
: 50ns à 45ns@55ns
- tBW
: 50ns à 45ns@55ns
- tWP
: 45ns à 40ns@55ns
- tCHZ
- tOHZ
- tBHZ
: 30ns à 20ns@55ns , 30ns à 25ns@70ns
: 30ns à 20ns@55ns , 30ns à 25ns@70ns
: 30ns à 20ns@55ns , 30ns à 25ns@70ns
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.10 /Jan2002
Hynix Semiconductor
1 page  
HY62UF16804A
AC CHARACTERISTICS
Vcc = 2.7V~3.3V, TA = 0°C to 70°C/ -40°C to 85°C unless otherwise specified
# Symbol Parameter
-55 -70
Min. Max. Min. Max.
READ CYCLE
1 tRC
Read Cycle Time
55 - 70 -
2 tAA
Address Access Time
- 55 - 70
3 tACS
Chip Select Access Time
- 55 - 70
4 tOE
Output Enable to Output Valid
- 25 - 35
5 tBA
/LB, /UB Access Time
- 55 - 70
6 tCLZ
Chip Select to Output in Low Z
10 - 10 -
7 tOLZ
Output Enable to Output in Low Z
5-5-
8 tBLZ
/LB, /UB Enable to Output in Low Z
10
-
10
-
9 tCHZ
Chip Deselection to Output in High Z
0
20
0
25
10 tOHZ Out Disable to Output in High Z
0 20 0 25
11 tBHZ /LB, /UB Disable to Output in High Z 0 20 0 25
12 tOH
Output Hold from Address Change
10 - 10 -
WRITE CYCLE
13 tWC
Write Cycle Time
55 - 70 -
14 tCW
Chip Selection to End of Write
45 - 60 -
15 tAW
Address Valid to End of Write
45 - 60 -
16 tBW
/LB, /UB Valid to End of Write
45 - 60 -
17 tAS
Address Set-up Time
0-0-
18 tWP
Write Pulse Width
40 - 50 -
19 tWR
Write Recovery Time
0-0-
20 tWHZ Write to Output in High Z
0 20 0 25
21 tDW
Data to Write Time Overlap
25 - 30 -
22 tDH
Data Hold from Write Time
0-0-
23 tOW
Output Active from End of Write
5-5-
-85
Min Max.
85 -
- 85
- 85
- 45
- 85
10 -
5-
10 -
0 30
0 30
0 30
10 -
85 -
70 -
70 -
70 -
0-
55 -
0-
0 30
35 -
0-
5-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CONDITIONS
TA = 0°C to 70°C / -40°C to 85°C, unless otherwise specified
PARAMETER
Input Pulse Level
Input Rise and Fall Time
Input and Output Timing Reference Level
Output Load
tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW
Other
Value
0.4V to 2.2V
5ns
1.5V
CL = 5pF + 1TTL Load
CL = 30pF + 1TTL Load
AC TEST LOADS
VTM = 2.8V
D
OUT
1029 Ohm
CL(1)
1728 Ohm
Note
1. Including jig and scope capacitance
Rev.10/Jan. 2002
4
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HY62UF16804A.PDF ] | |
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