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PDF PI90LVB051 Data sheet ( Hoja de datos )
| Número de pieza | PI90LVB051 | |
| Descripción | (PI90LVBxxx) 3.3V Boost LVDS High-Speed Differential Line Drivers and Receivers | |
| Fabricantes | Pericom Semiconductor | |
| Logotipo |  |
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PI90LVB179/PI90LVB180/
PI90LVB050/PI90LVB051111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
3.3V Boost LVDS High-Speed Differential Line Drivers and Receivers
Product Features
• Signaling Rates >660 Mbps (330 MHz)
• Single 3.3V Power Supply Design
• Driver:
— ±350mV Differential Swing into a 50 ohm load
— Propogation Delay of 1.5ns Typ.
— Low Voltage TTL (LVTTL) Inputs are 5V Tolerant
— Driver is High Impedance when Disabled or VCC < 1.5V
• Receiver:
— Accepts ±50mV (min.) Differential Swing with up to 2.0V
ground potential difference
— Propagation Delay of 3.3ns Typ.
— Low Voltage TTL (LVTTL) Outputs
— Open, Short, and Terminated Fail Safe
• Industrial Temperature Operating Range: –40°C to 85°C
• Package Options: SOIC, TSSOP, MSOP
• Bus-TerminalESD>12kV
PI90LVB179
VCC
ROUT
DIN
GND
18
2 8-Pin 7
3 U, W 6
45
RIN+
RIN
DOUT
DOUT+
DIN
ROUT
DOUT+
DOUT-
RIN+
RIN-
Product Description
The PI90LVB179, PI90LVB180, PI90LVB050, and PI90LVB051 are
differential line drivers and receivers (transceivers) that are similar
to the IEEE 1596.3 SCI and ANSI/TIA/EIA-644 LVDS standards (the
difference is that the driver output current is doubled). This modi-
fication enables true half-duplex operation with more than one LVDS
driver or with two line transmission resistors over a 50 ohm differen-
tial transmission line. These devices use low-voltage differential
signaling (LVDS) to achieve data rates in excess of 660 Mbps while
being less susceptible to noise than single-ended transmission.
The drivers translate a low-voltage TTL/CMOS input into a low-
voltage (350mV typical) differential output signal into a 50-ohm load.
The receivers translate a differential 350mV input signal to a 3V CMOS
output level. Driver section can be independently set to a power-down
and high-impedance output mode with the DEN pin (active HIGH).
Receiver section is controlled by the REN* pin (active LOW).
Applications
Applications include point-to-point and multidrop baseband data
transmission over a controlled impedance media of approximately 50
ohms. These include intra-system connections via printed circuit
board traces or cables, hubs and routers for data communi- cations;
PBXs, switches, repeaters and base stations for telecommunications
and other applications such as digital cameras, printers and copiers.
PI90LVB050
RIN1
RIN1+
ROUT1
REN*
ROUT2
RIN2+
RIN2
GND
1 16
2 15
3
4
16-Pin1143
5 L, W 12
6 11
7 10
89
VCC
DIN1
DOUT1+
DOUT1
DEN
DOUT2
DOUT2+
DIN2
DIN1
DEN
DIN2
ROUT1
REN*
ROUT2
DOUT1+
DOUT1-
DOUT2+
DOUT2-
RIN1+
RIN1-
RIN2+
RIN2-
PI90LVB180
NC
ROUT
REN*
DEN
DIN
GND
GND
1 14
2 13
3 14-Pin12
4
5
L, W
11
10
69
78
VCC
VCC
RIN+
RIN
DOUT
DOUT+
NC
DIN
DEN
REN*
ROUT
DOUT+
DOUT-
RIN+
RIN-
PI90LVB051
RIN1
RIN1+
ROUT1
DEN1
ROUT2
RIN2+
RIN2
GND
1 16
2 15
3
4
16-Pin
14
13
5 L, W 12
6 11
7 10
89
VCC
DIN1
DOUT1+
DOUT1
DEN2
DOUT2
DOUT2+
DIN2
DIN1
DEN1
ROUT1
DIN2
DEN2
ROUT2
DOUT1+
DOUT1-
RIN1+
RIN1-
DOUT2+
DOUT2-
RIN2+
RIN2-
1
PS8540
05/01/01
1 page  
PI90LVB179/PI90LVB180/
PI90LVB050/PI90LVB051
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778839900.11322V334455B6677o8899o0011s22t11L223344V5566D7788S9900H112233i44g55h6677-88S9900p1122e33e44d556677D8899i00f11f22e11r2233e44n5566t77i88a99l0011L2233i44n5566e7788D9900r11i22v3344e55r6677s88&99001122R1122e33c4455e66i77v8899e00r11s2233
Receiving Switching Characteristics (Over recommended operating conditions unless otherwise noted).
Parameter
Test Conditions Min. Typ.† Max. Units
tPLH Propagation delay time, low-to-high-level output
1.9 2.9
tPHL
tsk(p)
tsk(pp)**
Propagation delay time, lhigh-to-low-level output
Pulse skew (tPHL – tPLH)
Part-part-part skew**
CL = 10pF
See Figure 6
2.4 3.3 ns
0.1 0.4
1.3
tsk(o) Channel-to-channel skew
40 80 ps
tr Output signal rise time
1.1 1.7
tf Output signal fall time
1.3 2.1
tPZH Propagation delay time, high-level-to-high-impedance output
tPZL Propagation delay time, low-level-to-low-impedance output
See Figure 7
tPHZ Propagation delay time, high-impedance-to-high-level output
1.6 2.4
ns
4.1 5.9
2.5 3.2
tPLZ Propagation delay time, low-impedance-to-high-level output
6.0 7.8
†All typical values are at 25°C with a 3.3V supply
**tsk(pp) is magnitude of the difference in propagation delay times between any specific terminals of two devices (all things being equal)
Parameter Measurement Information
Driver
DEN
II
DIN
VI
DOUT+
DOUT–
DOD+
VOD
VOD+
VOC
VOD–
VOD+VOD+
2
Figure 1. Driver Voltage and Current Definitions
5
PS8540
05/01/01
5 Page 
PI90LVB179/PI90LVB180/
PI90LVB050/PI90LVB051
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778839900.11322V334455B6677o8899o0011s22t11L223344V5566D7788S9900H112233i44g55h6677-88S9900p1122e33e44d556677D8899i00f11f22e11r2233e44n5566t77i88a99l0011L2233i44n5566e7788D9900r11i22v3344e55r6677s88&99001122R1122e33c4455e66i77v8899e00r11s2233
8-Pin SOIC W Package
8
.149 3.78
.157 3.99
.0099
.0196
0.25
0.50
x 45˚
1
.189 4.80
.196 5.00
.016
.026
0.406
0.660
REF
0-8˚
.053 1.35
.068 1.75
SEATING PLANE
0.40 .016
1.27 .050
.2284
.2440
5.80
6.20
.0075 0.19
.0098 0.25
.050
BSC
1.27
.0040 0.10
.0098 0.25
.013 0.330
.020 0.508
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
8-Pin Mini Small Outline U Package (MSOP)
11
PS8540
05/01/01
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet PI90LVB051.PDF ] | |
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