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PDF MB15F88UL Data sheet ( Hoja de datos )

Número de pieza MB15F88UL
Descripción FRACTIONAL-N PLL FREQUENCY SYNTHESIZER
Fabricantes Fujitsu Media Devices 
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-21370-2E
ASSP
Fractional-N
PLL Frequency Synthesizer
MB15F88UL
s DESCRIPTION
The Fujitsu MB15F88UL is Fractional-N Phase Locked Loop (PLL) frequency synthesizer with fast lock up function.
The Fractional-N PLL operating up to 2600 MHz and the integer PLL operating up to 1200 MHz are integrated
on one chip.
The MB15F88UL is used as charge pump which is well-balanced output current with 1.5 mA and 6 mA selectable
by serial data, direct power save control and digital lock detector. In addition, the MB15F88UL adopts a new
architecture to achieve fast lock.
The new package (Thin Bump Chip Carrier20) decreases a mount area of the MB15F88UL more than 30%
comparing with the former B.C.C.16 (for dual PLL, MB15F08SL) .
The MB15F88UL is ideally suited for wireless mobile communications, such as W-CDMA.
s FEATURES
• High frequency operation
: RX synthesizer : 2600 MHz Max
TX synthesizer : 1200 MHz Max
• Low power supply voltage
: VCC = 2.7 V to 3.6 V
• Ultra Low power supply current : ICC = 6.0 mA Typ ( VCC = Vp = 3.0 V, Ta = + 25 °C, SW = 0 in TX and RX
locking state)
• 23-bit shift register input control
s PACKAGES
(Continued)
20-pin, plastic TSSOP
20-pad, plastic BCC
(FPT-20P-M06)
(LCC-20P-M05)

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MB15F88UL
s ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min Max
Unit
Power supply voltage
VCC 0.5 +4.0
Vp VCC +4.0
V
V
Input voltage
VI
0.5
VCC + 0.5
V
Output voltage
LD/fout
DO
VO
VDO
GND
GND
VCC
Vp
V
V
Storage temperature
Tstg 55 +125
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Value
Typ
Max
Unit
Remark
Power supply voltage
VCC 2.7 3.0 3.6 V VCCRX = VCCTX
Vp VCC 3.0 3.6 V
Input voltage
VI GND
VCC V
Operating temperature
Ta 40  +85 °C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
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MB15F88UL
TX synthesizer Data Setting (Integer)
The divide ratio can be calculated using the following equation :
fVCOTX = [ (P × N) + A] × fosc÷R (A < N)
fVCOTX
P
N
A
fosc
R
: Output frequency of external voltage controlled oscillator (VCO)
: Preset divide ratio of modulus prescaler (16 or 32)
: Preset divide ratio of binary 11 bit programmable counter (3 to 2047)
: Preset divide ratio of binary 5 bit swallow counter (0 to 31)
: Output frequency of the reference frequency oscillator
: Preset divide ratio of binary 14 bit reference counter (8 to 16383)
Binary 14-bit Programmable Reference Counter Data Setting (RC1 to RC14)
Divide ratio
(R)
RC14 RC13 RC12 RC11 RC10
RC9
RC8
RC7
RC6
RC5
RC4
RC3
RC2
RC1
8 00000000001000
9 00000000001001
 
16383
11111111111111
Note : Divide ratio less than 8 is prohibited.
Binary 11-bit Programmable Counter Data Setting (NC1 to NC11)
Divide ratio (N) NC11 NC10 NC9 NC8 NC7 NC6 NC5 NC4 NC3 NC2 NC1
3 00000000011
4 00000000100
 
2047
11111111111
Note : Divide ratio less than 3 is prohibited.
Binary 5-bit Swallow Counter Data Setting (AC1 to AC5)
Divide ratio (A)
AC5
AC4
AC3
AC2
AC1
0 00000
1 00001
2 00010
 
31 1 1 1 1 1
Note : A < N, AC6 to AC7 = 0
Prescaler Data Setting (SWC)
SWC
1
0
Prescaler divide ratio
16/17
32/33
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